JP2018087960A - 表示方法、表示装置、表示モジュールおよび電子機器 - Google Patents
表示方法、表示装置、表示モジュールおよび電子機器 Download PDFInfo
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- JP2018087960A JP2018087960A JP2017154952A JP2017154952A JP2018087960A JP 2018087960 A JP2018087960 A JP 2018087960A JP 2017154952 A JP2017154952 A JP 2017154952A JP 2017154952 A JP2017154952 A JP 2017154952A JP 2018087960 A JP2018087960 A JP 2018087960A
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- Prior art keywords
- voltage
- inverting input
- input terminal
- transistor
- circuit
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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Abstract
【解決手段】第1および第2のトランスコンダクタンスアンプと、バッファと、を有するバッファアンプと、x行y列(x、yは2以上の整数)のマトリクス状に配列され、階調を表示する機能を有する画素と、を有する表示装置。第1のステップにおいて、第2のトランスコンダクタンスアンプを用いてバッファアンプのオフセット電圧を補正する。その後、第2のステップにより、第1のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の一方に、2行分以上x行分以下の画素により表示される階調に対応する分の第1のアナログ信号を入力し、バッファの出力端子から第1のアナログ信号と対応する分だけ第2のアナログ信号を出力する。
【選択図】図6
Description
本実施の形態では、本発明の一態様の表示装置の構成例および表示方法の一例について、図1乃至図16を用いて説明する。
本実施の形態では、本発明の一態様の表示装置が有する画素の詳細な構成について図17乃至図23を用いて説明する。
本実施の形態では、本発明の一態様で開示されるトランジスタに用いることができるCAC−OSの構成について説明する。
本実施の形態では、本発明の一態様の表示装置を有する表示モジュールおよび本発明の一態様の表示装置を有する電子機器について、図24および図25を用いて説明する。
トランジスタの作製工程について説明する。トランジスタとして、ボトムゲート、トップコンタクト、チャネルエッチ型のトランジスタを作製した。以下に作製方法を説明する。なおいずれのトランジスタについても、ボトムゲートに対して、活性層を挟んで反対側に第2のゲートを設けた。またボトムゲートと第2のゲートは電気的に接続されている。
次に、図28に示す回路を用いてトランジスタの充電特性を評価した。評価において、チャネル長が2μm、チャネル幅が200μmのトランジスタを用いた。測定開始前にリセットスイッチRSをオンとし、OUT電圧を接地電位とし、Gate端子に0Vを与える。その後、リセットスイッチをオフとし、Gate端子に10Vの電位を与え、IN端子に5Vの電位を与え、OUT端子の電圧を測定した。
11 表示部
12 ゲートドライバ回路
13 ゲートドライバ回路
14 ソースドライバ回路
21 シフトレジスタ
22 ラッチ回路
23 レベルシフタ回路
24 D/A変換回路
24a D/A変換回路
24b D/A変換回路
25 レベルシフタ回路
26 インターフェース回路
27 制御回路
28 メモリ回路
29 検出器
30 画素
31 画素回路
32 画素回路
33 開口
34 反射光
35 光
40 バッファアンプ
40a バッファアンプ
40b バッファアンプ
40c バッファアンプ
41 抵抗ストリング
42 パストランジスタロジック回路
42a パストランジスタロジック回路
42b パストランジスタロジック回路
43 抵抗ストリング
44 パストランジスタロジック回路
45 抵抗素子
46a トランジスタ
46b トランジスタ
46c トランジスタ
46d トランジスタ
47 抵抗素子
48a トランジスタ
48b トランジスタ
51 トランスコンダクタンスアンプ
52 トランスコンダクタンスアンプ
53 バッファ
54 トランジスタ
55 トランジスタ
56 トランジスタ
57 トランジスタ
58 容量素子
59 容量素子
61 トランジスタ
62 トランジスタ
64 トランジスタ
66 トランジスタ
67 トランジスタ
69 トランジスタ
70 トランジスタ
72 トランジスタ
73 トランジスタ
74 トランジスタ
75 トランジスタ
76 トランジスタ
77 トランジスタ
78 トランジスタ
79 トランジスタ
80 トランジスタ
81 トランジスタ
83 トランジスタ
90 プリント基板
91 タイミングコントローラ
93 FPC
95 デマルチプレクサ
96 FPC
621 層
622 層
623 層
631 基板
632 基板
633 発光層
634 電極
635 導電層
636 カラーフィルター
637 導電層
638 導電層
639 液晶
640 導電層
641 カラーフィルター
651 接着層
652 絶縁層
653 絶縁層
654 絶縁層
655 絶縁層
656 絶縁層
657 絶縁層
658 絶縁層
659 絶縁層
660 配向膜
661 配向膜
662 遮光膜
663 導電層
664 導電層
665 絶縁層
670 接続部
671 接続層
672 FPC
673 接着層
680 トランジスタ
690 接続部
691 接続体
8000 表示モジュール
8001 上部カバー
8002 下部カバー
8003 FPC
8004 タッチパネル
8005 FPC
8006 表示パネル
8009 フレーム
8010 プリント基板
8011 バッテリ
9000 筐体
9001 表示部
9003 スピーカ
9005 操作キー
9006 接続端子
9007 センサー
9008 マイクロフォン
9050 操作ボタン
9051 情報
9052 情報
9053 情報
9054 情報
9055 ヒンジ
9100 テレビジョン装置
9101 携帯情報端末
9102 携帯情報端末
9200 携帯情報端末
9201 携帯情報端末
Claims (12)
- 第1のトランスコンダクタンスアンプと、第2のトランスコンダクタンスアンプと、バッファと、を有するバッファアンプと、x行y列(x、yは2以上の整数)のマトリクス状に配列され、階調を表示する機能を有する画素と、を有する表示装置において、
前記第2のトランスコンダクタンスアンプを用いて、前記バッファアンプのオフセット電圧を補正する第1のステップを有し、
前記第1のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の一方に、前記画素により表示される階調に対応する電圧の第1のアナログ信号を入力し、前記バッファの出力端子から前記第1のアナログ信号の電圧と対応する電圧の第2のアナログ信号を出力する第2のステップを有し、
前記第1のステップの終了後、前記第2のステップにより2行分以上x行分以下の前記画素により表示される階調に対応する分の前記第1のアナログ信号を入力し、前記バッファの出力端子から前記第1のアナログ信号と対応する分だけ第2のアナログ信号を出力し、
前記第1のステップと、前記第2のステップと、を交互に繰り返すことを特徴とする表示方法。 - 請求項1において、
前記表示装置は、第1の容量素子と、第2の容量素子と、を有し、
前記第1の容量素子の一方の端子は、前記第2のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の一方と電気的に接続され、
前記第2の容量素子の一方の端子は、前記第2のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の他方と電気的に接続され、
前記第2のステップにおいて、前記第2のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の一方の電圧は、前記第1の容量素子に保持された電荷に対応し、
前記第2のステップにおいて、前記第2のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の他方の電圧は、前記第2の容量素子に保持された電荷に対応することを特徴とする表示方法。 - 第1のトランスコンダクタンスアンプと、第2のトランスコンダクタンスアンプと、バッファと、を有するバッファアンプと、x行y列(x、yは2以上の整数)のマトリクス状に配列され、階調表示を行う機能を有する画素と、第1の容量素子と、第2の容量素子と、検出器と、を有する表示装置において、
前記第1の容量素子の一方の端子は、前記第2のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の一方と電気的に接続され、
前記第2の容量素子の一方の端子は、前記第2のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の他方と電気的に接続され、
前記検出器は、前記第1の容量素子の一方の端子と電気的に接続され、
前記検出器は、前記第2の容量素子の一方の端子と電気的に接続され、
前記第2のトランスコンダクタンスアンプを用いて、前記バッファアンプのオフセット電圧を補正する第1のステップを有し、
前記第1のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の一方に、前記画素により表示される階調に対応する電圧の第1のアナログ信号を入力し、前記バッファの出力端子から前記第1のアナログ信号の電圧と対応する電圧の第2のアナログ信号を出力する第2のステップを有し、
前記第1のステップの終了後、前記第2のステップを実行し、
前記第2のステップにおいて、前記第2のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の一方の電圧は、前記第1の容量素子に保持された電荷に対応し、
前記第2のステップにおいて、前記第2のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の他方の電圧は、前記第2の容量素子に保持された電荷に対応し、
前記第2のステップにより、前記バッファの出力端子からr行分(rは1以上x以下の整数)の前記画素により表示される階調に対応する分の前記第2のアナログ信号が出力された後、前記検出器により、前記第1の容量素子に保持された電荷量および前記第2の容量素子に保持された電荷量を検出し、
前記第1の容量素子に保持された電荷量または前記第2の容量素子に保持された電荷量の少なくとも一方が、規定値を下回った場合、前記第1のステップを実行し、
前記第1の容量素子に保持された電荷量および前記第2の容量素子に保持された電荷量の両方が、前記規定値以上となった場合、引き続き前記第2のステップを実行することを特徴とする表示方法。 - 請求項2または3において、
前記表示装置は、第1のトランジスタと、第2のトランジスタと、を有し、
前記第1のトランジスタのソースまたはドレインの一方は、前記第2のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の一方と電気的に接続され、
前記第2のトランジスタのソースまたはドレインの一方は、前記第2のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の他方と電気的に接続され、
前記第1のステップにおいて、前記第1のトランジスタおよび前記第2のトランジスタを導通状態とし、
前記第2のステップにおいて、前記第1のトランジスタおよび前記第2のトランジスタを非導通状態とすることを特徴とする表示方法。 - 請求項4において、
前記第1のトランジスタのチャネル形成領域および、前記第2のトランジスタのチャネル形成領域は、インジウム、元素M(元素Mはアルミニウム、ガリウム、イットリウム、またはスズ)、亜鉛の少なくとも一を含む酸化物を有することを特徴とする表示方法。 - 請求項1乃至5のいずれか一項において、
前記第1のステップにおいて、前記第1のトランスコンダクタンスアンプの非反転入力端子と、前記第1のトランスコンダクタンスアンプの反転入力端子と、前記第2のトランスコンダクタンスアンプの非反転入力端子または反転入力端子の一方と、に同一の電圧を入力することを特徴とする表示方法。 - 請求項1乃至6のいずれか一項において、
前記表示装置は、第1の回路と、第2の回路と、第3の回路と、を有し、
前記第1の回路は、第1のクロック信号および第2のクロック信号を生成する機能を有し、
前記第1の回路は、前記第1のクロック信号に対応させて、前記画素により表示される階調に対応するデジタル信号を、前記第2の回路に出力する機能を有し、
前記第1の回路は、前記第2のクロック信号を前記第3の回路に出力する機能を有し、
前記第2の回路は、前記デジタル信号を保持する機能を有し、
前記第1のステップにおいて、前記第2のクロック信号の電圧は一定とし、
前記第2のステップにおいて、前記第2のクロック信号に同期して前記第2のアナログ信号を出力し、
前記第3の回路は、前記第2のステップにおいて、前記第2の回路から前記デジタル信号を読み出す機能を有することを特徴とする表示方法。 - 請求項7において、
前記第3の回路は、前記バッファアンプを有し、
前記第3の回路は、前記デジタル信号を前記第2のアナログ信号に変換する機能を有することを特徴とする表示方法。 - 請求項1乃至8のいずれか一項において、
前記画素は、発光素子と、非発光素子と、を有することを特徴とする表示方法。 - 請求項1乃至9のいずれか一に記載の表示方法により表示を行う機能を有する表示装置。
- 請求項10に記載の表示装置と、
タッチパネルと、
を有することを特徴とする表示モジュール。 - 請求項10に記載の表示装置、または請求項11に記載の表示モジュールと、
操作キーまたはバッテリと、を
有することを特徴とする電子機器。
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WO2018150290A1 (en) | 2017-02-16 | 2018-08-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display panel, display device, input/output device, and data processing device |
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