JP2017501581A5 - - Google Patents
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- Publication number
- JP2017501581A5 JP2017501581A5 JP2016541713A JP2016541713A JP2017501581A5 JP 2017501581 A5 JP2017501581 A5 JP 2017501581A5 JP 2016541713 A JP2016541713 A JP 2016541713A JP 2016541713 A JP2016541713 A JP 2016541713A JP 2017501581 A5 JP2017501581 A5 JP 2017501581A5
- Authority
- JP
- Japan
- Prior art keywords
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- active
- active contacts
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- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 239000004020 conductor Substances 0.000 claims 6
- 239000004065 semiconductor Substances 0.000 claims 5
- 229910052751 metal Inorganic materials 0.000 claims 2
- 239000002184 metal Substances 0.000 claims 2
- 238000000034 method Methods 0.000 claims 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 2
- 229920005591 polysilicon Polymers 0.000 claims 2
- 239000000758 substrate Substances 0.000 claims 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 1
- 229910052802 copper Inorganic materials 0.000 claims 1
- 239000010949 copper Substances 0.000 claims 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims 1
- 229910052721 tungsten Inorganic materials 0.000 claims 1
- 239000010937 tungsten Substances 0.000 claims 1
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201461923482P | 2014-01-03 | 2014-01-03 | |
| US61/923,482 | 2014-01-03 | ||
| US14/283,162 US9508589B2 (en) | 2014-01-03 | 2014-05-20 | Conductive layer routing |
| US14/283,162 | 2014-05-20 | ||
| PCT/US2014/065529 WO2015102753A1 (en) | 2014-01-03 | 2014-11-13 | Conductive layer routing |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2017501581A JP2017501581A (ja) | 2017-01-12 |
| JP2017501581A5 true JP2017501581A5 (enExample) | 2017-02-23 |
| JP6224844B2 JP6224844B2 (ja) | 2017-11-01 |
Family
ID=52102992
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016541713A Expired - Fee Related JP6224844B2 (ja) | 2014-01-03 | 2014-11-13 | 導電層ルーティング |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US9508589B2 (enExample) |
| EP (1) | EP3090444B1 (enExample) |
| JP (1) | JP6224844B2 (enExample) |
| CN (1) | CN105874586A (enExample) |
| WO (1) | WO2015102753A1 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9455226B2 (en) | 2013-02-01 | 2016-09-27 | Mediatek Inc. | Semiconductor device allowing metal layer routing formed directly under metal pad |
| US9536833B2 (en) | 2013-02-01 | 2017-01-03 | Mediatek Inc. | Semiconductor device allowing metal layer routing formed directly under metal pad |
| EP3131118B1 (en) * | 2015-08-12 | 2019-04-17 | MediaTek Inc. | Semiconductor device allowing metal layer routing formed directly under metal pad |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01117342A (ja) * | 1987-10-30 | 1989-05-10 | Oki Electric Ind Co Ltd | コンタクトホールの形成方法 |
| JPH0982799A (ja) * | 1995-09-13 | 1997-03-28 | Hitachi Ltd | 配線基板およびその製造方法 |
| US6174803B1 (en) | 1998-09-16 | 2001-01-16 | Vsli Technology | Integrated circuit device interconnection techniques |
| US20070196983A1 (en) * | 2006-02-22 | 2007-08-23 | Hynix Semiconductor Inc. | Method of manufacturing non-volatile memory device |
| WO2007116515A1 (ja) * | 2006-04-07 | 2007-10-18 | Philtech Inc. | 半導体装置及びその製造方法、ドライエッチング方法、並びに配線材料の作製方法 |
| KR100811442B1 (ko) | 2007-02-09 | 2008-03-07 | 주식회사 하이닉스반도체 | 반도체 소자 및 그의 제조 방법 |
| US7791109B2 (en) | 2007-03-29 | 2010-09-07 | International Business Machines Corporation | Metal silicide alloy local interconnect |
| JP2008270256A (ja) * | 2007-04-16 | 2008-11-06 | Denso Corp | 半導体装置およびその製造方法 |
| US8907316B2 (en) | 2008-11-07 | 2014-12-09 | Macronix International Co., Ltd. | Memory cell access device having a pn-junction with polycrystalline and single crystal semiconductor regions |
| US8124525B1 (en) | 2010-10-27 | 2012-02-28 | International Business Machines Corporation | Method of forming self-aligned local interconnect and structure formed thereby |
| DE102011004323B4 (de) | 2011-02-17 | 2016-02-25 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Halbleiterbauelement mit selbstjustierten Kontaktelementen und Verfahren zu seiner Herstellung |
| US8765599B2 (en) * | 2012-01-06 | 2014-07-01 | GlobalFoundries, Inc. | Semiconductor devices having dielectric caps on contacts and related fabrication methods |
-
2014
- 2014-05-20 US US14/283,162 patent/US9508589B2/en active Active
- 2014-11-13 WO PCT/US2014/065529 patent/WO2015102753A1/en not_active Ceased
- 2014-11-13 CN CN201480072114.5A patent/CN105874586A/zh active Pending
- 2014-11-13 JP JP2016541713A patent/JP6224844B2/ja not_active Expired - Fee Related
- 2014-11-13 EP EP14812669.1A patent/EP3090444B1/en active Active
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