JP2019525480A5 - - Google Patents
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- JP2019525480A5 JP2019525480A5 JP2019506475A JP2019506475A JP2019525480A5 JP 2019525480 A5 JP2019525480 A5 JP 2019525480A5 JP 2019506475 A JP2019506475 A JP 2019506475A JP 2019506475 A JP2019506475 A JP 2019506475A JP 2019525480 A5 JP2019525480 A5 JP 2019525480A5
- Authority
- JP
- Japan
- Prior art keywords
- source
- drain
- gate width
- dummy gate
- active
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims 12
- 238000009792 diffusion process Methods 0.000 claims 9
- 238000000034 method Methods 0.000 claims 5
- 238000000926 separation method Methods 0.000 claims 5
- 230000005669 field effect Effects 0.000 claims 2
- 239000007943 implant Substances 0.000 claims 2
- 238000005468 ion implantation Methods 0.000 claims 2
- 230000001413 cellular effect Effects 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
- 239000003826 tablet Substances 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/245,777 | 2016-08-24 | ||
| US15/245,777 US9634138B1 (en) | 2016-08-24 | 2016-08-24 | Field-effect transistor (FET) devices employing adjacent asymmetric active gate / dummy gate width layout |
| PCT/US2017/047747 WO2018039108A1 (en) | 2016-08-24 | 2017-08-21 | Field-effect transistor (fet) devices employing adjacent asymmetric active gate / dummy gate width layout |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2019525480A JP2019525480A (ja) | 2019-09-05 |
| JP2019525480A5 true JP2019525480A5 (enExample) | 2020-09-17 |
Family
ID=58547203
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019506475A Pending JP2019525480A (ja) | 2016-08-24 | 2017-08-21 | 隣接する非対称アクティブゲート／ダミーゲート幅レイアウトを採用する電界効果トランジスタ（ｆｅｔ）デバイス |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US9634138B1 (enExample) |
| EP (1) | EP3504732B1 (enExample) |
| JP (1) | JP2019525480A (enExample) |
| KR (1) | KR20190040488A (enExample) |
| CN (1) | CN109643658B (enExample) |
| BR (1) | BR112019002959A2 (enExample) |
| WO (1) | WO2018039108A1 (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9634138B1 (en) | 2016-08-24 | 2017-04-25 | Qualcomm Incorporated | Field-effect transistor (FET) devices employing adjacent asymmetric active gate / dummy gate width layout |
| US9997360B2 (en) * | 2016-09-21 | 2018-06-12 | Qualcomm Incorporated | Method for mitigating layout effect in FINFET |
| CN108281479A (zh) * | 2017-01-06 | 2018-07-13 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
| US10134859B1 (en) | 2017-11-09 | 2018-11-20 | International Business Machines Corporation | Transistor with asymmetric spacers |
| US10916478B2 (en) * | 2018-02-20 | 2021-02-09 | Globalfoundries U.S. Inc. | Methods of performing fin cut etch processes for FinFET semiconductor devices |
| KR102535087B1 (ko) * | 2018-04-20 | 2023-05-19 | 삼성전자주식회사 | 반도체 장치 |
| US10475693B1 (en) * | 2018-06-07 | 2019-11-12 | Globalfoundries Inc. | Method for forming single diffusion breaks between finFET devices and the resulting devices |
| US10236364B1 (en) | 2018-06-22 | 2019-03-19 | International Busines Machines Corporation | Tunnel transistor |
| US10249755B1 (en) | 2018-06-22 | 2019-04-02 | International Business Machines Corporation | Transistor with asymmetric source/drain overlap |
| KR102577262B1 (ko) | 2018-08-14 | 2023-09-11 | 삼성전자주식회사 | 확산 방지 영역을 갖는 반도체 소자 |
| US10483200B1 (en) * | 2018-09-27 | 2019-11-19 | Qualcomm Incorporated | Integrated circuits (ICs) employing additional output vertical interconnect access(es) (VIA(s)) coupled to a circuit output VIA to decrease circuit output resistance |
| TWI788487B (zh) * | 2018-12-21 | 2023-01-01 | 聯華電子股份有限公司 | 半導體元件 |
| US11710768B2 (en) | 2021-05-26 | 2023-07-25 | International Business Machines Corporation | Hybrid diffusion break with EUV gate patterning |
| US12230684B2 (en) * | 2021-07-26 | 2025-02-18 | Samsung Electronics Co., Ltd. | Integrated circuit with continuous active region and raised source/drain region |
Family Cites Families (30)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100425462B1 (ko) * | 2001-09-10 | 2004-03-30 | 삼성전자주식회사 | Ｓｏｉ 상의 반도체 장치 및 그의 제조방법 |
| KR100714285B1 (ko) * | 2004-12-28 | 2007-05-02 | 주식회사 하이닉스반도체 | 반도체 장치 및 그 제조방법 |
| US7732845B2 (en) * | 2008-04-08 | 2010-06-08 | International Business Machines Corporation | Pixel sensor with reduced image lag |
| US7777282B2 (en) * | 2008-08-13 | 2010-08-17 | Intel Corporation | Self-aligned tunneling pocket in field-effect transistors and processes to form same |
| US8143131B2 (en) * | 2009-03-31 | 2012-03-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating spacers in a strained semiconductor device |
| US8969958B1 (en) * | 2009-11-13 | 2015-03-03 | Maxim Integrated Products, Inc. | Integrated MOS power transistor with body extension region for poly field plate depletion assist |
| US8247869B2 (en) * | 2010-04-26 | 2012-08-21 | Freescale Semiconductor, Inc. | LDMOS transistors with a split gate |
| CN101834141B (zh) * | 2010-04-28 | 2015-03-04 | 复旦大学 | 一种不对称型源漏场效应晶体管的制备方法 |
| US9324866B2 (en) | 2012-01-23 | 2016-04-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for transistor with line end extension |
| US9673328B2 (en) | 2010-05-28 | 2017-06-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for providing line end extensions for fin-type active regions |
| US8193094B2 (en) | 2010-06-21 | 2012-06-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Post CMP planarization by cluster ION beam etch |
| US8643069B2 (en) * | 2011-07-12 | 2014-02-04 | United Microelectronics Corp. | Semiconductor device having metal gate and manufacturing method thereof |
| US8383485B2 (en) | 2011-07-13 | 2013-02-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Epitaxial process for forming semiconductor devices |
| US9337318B2 (en) * | 2012-10-26 | 2016-05-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET with dummy gate on non-recessed shallow trench isolation (STI) |
| US9209182B2 (en) | 2012-12-28 | 2015-12-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dummy metal gate structures to reduce dishing during chemical-mechanical polishing |
| US20140252491A1 (en) * | 2013-03-05 | 2014-09-11 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method of the same |
| KR102021768B1 (ko) | 2013-03-15 | 2019-09-17 | 삼성전자 주식회사 | 반도체 장치의 제조 방법 및 그 방법에 의해 제조된 반도체 장치 |
| US8846491B1 (en) | 2013-06-19 | 2014-09-30 | Globalfoundries Inc. | Forming a diffusion break during a RMG process |
| US9293586B2 (en) | 2013-07-17 | 2016-03-22 | Globalfoundries Inc. | Epitaxial block layer for a fin field effect transistor device |
| US9515172B2 (en) | 2014-01-28 | 2016-12-06 | Samsung Electronics Co., Ltd. | Semiconductor devices having isolation insulating layers and methods of manufacturing the same |
| US9871037B2 (en) | 2014-02-26 | 2018-01-16 | Taiwan Semiconductor Manufacturing Company Limited | Structures and methods for fabricating semiconductor devices using fin structures |
| US9171752B1 (en) | 2014-08-12 | 2015-10-27 | Globalfoundries Inc. | Product comprised of FinFET devices with single diffusion break isolation structures, and methods of making such a product |
| JP6449082B2 (ja) * | 2014-08-18 | 2019-01-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| KR102312262B1 (ko) * | 2014-09-02 | 2021-10-15 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
| US9373535B2 (en) | 2014-10-16 | 2016-06-21 | Globalfoundries Inc. | T-shaped fin isolation region and methods of fabrication |
| KR102264656B1 (ko) | 2014-10-17 | 2021-06-14 | 삼성전자주식회사 | 게이트 코어들 및 핀 액티브 코어를 포함하는 반도체 소자 및 그 제조 방법 |
| US9449971B2 (en) * | 2014-12-01 | 2016-09-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods of forming FinFETs |
| US9502243B2 (en) * | 2014-12-22 | 2016-11-22 | International Business Machines Corporation | Multi-orientation SOI substrates for co-integration of different conductivity type semiconductor devices |
| US9368496B1 (en) | 2015-01-30 | 2016-06-14 | Globalfoundries Inc. | Method for uniform recess depth and fill in single diffusion break for fin-type process and resulting devices |
| US9634138B1 (en) | 2016-08-24 | 2017-04-25 | Qualcomm Incorporated | Field-effect transistor (FET) devices employing adjacent asymmetric active gate / dummy gate width layout |
-
2016
- 2016-08-24 US US15/245,777 patent/US9634138B1/en active Active
-
2017
- 2017-03-09 US US15/454,099 patent/US10062768B2/en not_active Expired - Fee Related
- 2017-08-21 BR BR112019002959A patent/BR112019002959A2/pt not_active IP Right Cessation
- 2017-08-21 CN CN201780051432.7A patent/CN109643658B/zh active Active
- 2017-08-21 WO PCT/US2017/047747 patent/WO2018039108A1/en not_active Ceased
- 2017-08-21 KR KR1020197005151A patent/KR20190040488A/ko not_active Ceased
- 2017-08-21 JP JP2019506475A patent/JP2019525480A/ja active Pending
- 2017-08-21 EP EP17761965.7A patent/EP3504732B1/en active Active
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