JP2016174170A5 - - Google Patents

Download PDF

Info

Publication number
JP2016174170A5
JP2016174170A5 JP2016095168A JP2016095168A JP2016174170A5 JP 2016174170 A5 JP2016174170 A5 JP 2016174170A5 JP 2016095168 A JP2016095168 A JP 2016095168A JP 2016095168 A JP2016095168 A JP 2016095168A JP 2016174170 A5 JP2016174170 A5 JP 2016174170A5
Authority
JP
Japan
Prior art keywords
insulating layer
layer
circuit
soi structure
passive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2016095168A
Other languages
English (en)
Japanese (ja)
Other versions
JP6099794B2 (ja
JP2016174170A (ja
Filing date
Publication date
Priority claimed from US13/356,717 external-priority patent/US9496255B2/en
Application filed filed Critical
Publication of JP2016174170A publication Critical patent/JP2016174170A/ja
Publication of JP2016174170A5 publication Critical patent/JP2016174170A5/ja
Application granted granted Critical
Publication of JP6099794B2 publication Critical patent/JP6099794B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2016095168A 2011-11-16 2016-05-11 絶縁層および第2の層を有する積層されたチップセットおよびそれを形成する方法 Expired - Fee Related JP6099794B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201161560471P 2011-11-16 2011-11-16
US61/560,471 2011-11-16
US13/356,717 US9496255B2 (en) 2011-11-16 2012-01-24 Stacked CMOS chipset having an insulating layer and a secondary layer and method of forming same
US13/356,717 2012-01-24

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2014542512A Division JP5937225B2 (ja) 2011-11-16 2012-11-16 絶縁層および第2の層を有する積層されたチップセットおよびそれを形成する方法

Publications (3)

Publication Number Publication Date
JP2016174170A JP2016174170A (ja) 2016-09-29
JP2016174170A5 true JP2016174170A5 (enExample) 2017-02-09
JP6099794B2 JP6099794B2 (ja) 2017-03-22

Family

ID=48280458

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2014542512A Expired - Fee Related JP5937225B2 (ja) 2011-11-16 2012-11-16 絶縁層および第2の層を有する積層されたチップセットおよびそれを形成する方法
JP2016095168A Expired - Fee Related JP6099794B2 (ja) 2011-11-16 2016-05-11 絶縁層および第2の層を有する積層されたチップセットおよびそれを形成する方法

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP2014542512A Expired - Fee Related JP5937225B2 (ja) 2011-11-16 2012-11-16 絶縁層および第2の層を有する積層されたチップセットおよびそれを形成する方法

Country Status (7)

Country Link
US (1) US9496255B2 (enExample)
EP (1) EP2780942A1 (enExample)
JP (2) JP5937225B2 (enExample)
KR (2) KR101759689B1 (enExample)
CN (1) CN104054175B (enExample)
IN (1) IN2014MN01027A (enExample)
WO (1) WO2013075007A1 (enExample)

Families Citing this family (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104058363B (zh) * 2013-03-22 2016-01-20 上海丽恒光微电子科技有限公司 基于mems透射光阀的显示装置及其形成方法
US9418985B2 (en) * 2013-07-16 2016-08-16 Qualcomm Incorporated Complete system-on-chip (SOC) using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) technology
US9032353B2 (en) 2013-10-10 2015-05-12 Taiwan Semiconductor Manufacturing Co., Ltd. Method and system for three-dimensional layout design of integrated circuit elements in stacked CMOS
US9257407B2 (en) * 2013-10-28 2016-02-09 Qualcomm Incorporated Heterogeneous channel material integration into wafer
US9443758B2 (en) * 2013-12-11 2016-09-13 Taiwan Semiconductor Manufacturing Co., Ltd. Connecting techniques for stacked CMOS devices
KR102360695B1 (ko) 2014-01-23 2022-02-08 글로벌웨이퍼스 씨오., 엘티디. 고 비저항 soi 웨이퍼 및 그 제조 방법
US20160043108A1 (en) * 2014-08-07 2016-02-11 Silanna Semiconductor U.S.A., Inc. Semiconductor Structure with Multiple Active Layers in an SOI Wafer
US9786613B2 (en) * 2014-08-07 2017-10-10 Qualcomm Incorporated EMI shield for high frequency layer transferred devices
US9899499B2 (en) 2014-09-04 2018-02-20 Sunedison Semiconductor Limited (Uen201334164H) High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss
WO2016081367A1 (en) 2014-11-18 2016-05-26 Sunedison Semiconductor Limited HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING A CHARGE TRAPPING LAYER FORMED BY He-N2 CO-IMPLANTATION
JP6650463B2 (ja) 2014-11-18 2020-02-19 グローバルウェーハズ カンパニー リミテッドGlobalWafers Co.,Ltd. 電荷トラップ層を備えた高抵抗率の半導体・オン・インシュレーターウェハーの製造方法
JP6726180B2 (ja) 2014-11-18 2020-07-22 グローバルウェーハズ カンパニー リミテッドGlobalWafers Co.,Ltd. 高抵抗率半導体・オン・インシュレータウエハおよび製造方法
WO2016081363A1 (en) * 2014-11-18 2016-05-26 Sunedison Semiconductor Limited A system-on-chip on a semiconductor-on-insulator wafer and a method of manufacturing
EP4120320A1 (en) 2015-03-03 2023-01-18 GlobalWafers Co., Ltd. Charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
CN107408532A (zh) 2015-03-17 2017-11-28 太阳能爱迪生半导体有限公司 用于绝缘体上半导体结构的制造的热稳定电荷捕获层
US9881832B2 (en) 2015-03-17 2018-01-30 Sunedison Semiconductor Limited (Uen201334164H) Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof
CN107873106B (zh) 2015-06-01 2022-03-18 环球晶圆股份有限公司 制造绝缘体上硅锗的方法
WO2016196060A1 (en) 2015-06-01 2016-12-08 Sunedison Semiconductor Limited A method of manufacturing semiconductor-on-insulator
US20160379943A1 (en) * 2015-06-25 2016-12-29 Skyworks Solutions, Inc. Method and apparatus for high performance passive-active circuit integration
US20170033135A1 (en) * 2015-07-28 2017-02-02 Skyworks Solutions, Inc. Integrated passive device on soi substrate
US9768109B2 (en) * 2015-09-22 2017-09-19 Qualcomm Incorporated Integrated circuits (ICS) on a glass substrate
JP6585978B2 (ja) * 2015-09-24 2019-10-02 ラピスセミコンダクタ株式会社 半導体装置および半導体装置の製造方法
JP6749394B2 (ja) 2015-11-20 2020-09-02 グローバルウェーハズ カンパニー リミテッドGlobalWafers Co.,Ltd. 滑らかな半導体表面の製造方法
US10256863B2 (en) * 2016-01-11 2019-04-09 Qualcomm Incorporated Monolithic integration of antenna switch and diplexer
US9831115B2 (en) 2016-02-19 2017-11-28 Sunedison Semiconductor Limited (Uen201334164H) Process flow for manufacturing semiconductor on insulator structures in parallel
US10622247B2 (en) 2016-02-19 2020-04-14 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a buried high resistivity layer
US10468294B2 (en) 2016-02-19 2019-11-05 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface
EP3758050A1 (en) 2016-03-07 2020-12-30 GlobalWafers Co., Ltd. Semiconductor on insulator structure comprising a low temperature flowable oxide layer and method of manufacture thereof
WO2017155806A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
WO2017155804A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Method of manufacturing a semiconductor on insulator structure by a pressurized bond treatment
US11114332B2 (en) 2016-03-07 2021-09-07 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
CN111201341B (zh) 2016-06-08 2023-04-04 环球晶圆股份有限公司 具有经改进的机械强度的高电阻率单晶硅锭及晶片
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
US20180068886A1 (en) * 2016-09-02 2018-03-08 Qualcomm Incorporated Porous semiconductor layer transfer for an integrated circuit structure
US9812580B1 (en) * 2016-09-06 2017-11-07 Qualcomm Incorporated Deep trench active device with backside body contact
EP4723861A2 (en) 2016-10-26 2026-04-08 GlobalWafers Co., Ltd. High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
CN115714130A (zh) 2016-12-05 2023-02-24 环球晶圆股份有限公司 高电阻率绝缘体上硅结构及其制造方法
CN114093764B (zh) 2016-12-28 2025-07-22 太阳能爱迪生半导体有限公司 单晶硅晶片
JP6881066B2 (ja) * 2017-06-19 2021-06-02 大日本印刷株式会社 貫通電極基板および貫通電極基板の製造方法
SG11201913769RA (en) 2017-07-14 2020-01-30 Sunedison Semiconductor Ltd Method of manufacture of a semiconductor on insulator structure
JP7160943B2 (ja) 2018-04-27 2022-10-25 グローバルウェーハズ カンパニー リミテッド 半導体ドナー基板からの層移転を容易にする光アシスト板状体形成
JP2019212729A (ja) * 2018-06-04 2019-12-12 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
EP4210092A1 (en) 2018-06-08 2023-07-12 GlobalWafers Co., Ltd. Method for transfer of a thin layer of silicon
EP3675168A1 (en) * 2018-12-24 2020-07-01 IMEC vzw 3d power semiconductor device and system
FR3091004B1 (fr) * 2018-12-24 2020-12-04 Soitec Silicon On Insulator Structure de type semi-conducteur pour applications digitales et radiofréquences
JP2020141090A (ja) * 2019-03-01 2020-09-03 ソニーセミコンダクタソリューションズ株式会社 容量素子、半導体素子基板及び電子機器
KR102804065B1 (ko) 2020-07-13 2025-05-09 삼성전자주식회사 반도체 패키지 및 반도체 패키지의 제조 방법
CN114122134B (zh) * 2020-09-01 2023-12-22 苏州华太电子技术股份有限公司 一种射频ldmos集成器件
US12412835B2 (en) * 2021-04-27 2025-09-09 Intel Corporation Back-side power delivery with glass support at the front
WO2022232533A1 (en) * 2021-04-30 2022-11-03 Qorvo Us, Inc. Vertically stacked mems device and controller device
DE102022211198A1 (de) * 2022-10-21 2024-05-02 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren zur Herstellung eines mikromechanischen Bauelements

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001102523A (ja) 1999-09-28 2001-04-13 Sony Corp 薄膜デバイスおよびその製造方法
US6399997B1 (en) 2000-08-01 2002-06-04 Megic Corporation High performance system-on-chip using post passivation process and glass substrates
TW548860B (en) 2001-06-20 2003-08-21 Semiconductor Energy Lab Light emitting device and method of manufacturing the same
JP4244120B2 (ja) 2001-06-20 2009-03-25 株式会社半導体エネルギー研究所 発光装置及びその作製方法
WO2004015764A2 (en) 2002-08-08 2004-02-19 Leedy Glenn J Vertical system integration
JP2004165269A (ja) 2002-11-11 2004-06-10 Canon Inc 積層形半導体装置
JP2004349513A (ja) 2003-05-22 2004-12-09 Seiko Epson Corp 薄膜回路装置及びその製造方法、並びに電気光学装置、電子機器
CN102290425B (zh) * 2004-08-20 2014-04-02 Kamiyacho知识产权控股公司 具有三维层叠结构的半导体器件的制造方法
US7179719B2 (en) 2004-09-28 2007-02-20 Sharp Laboratories Of America, Inc. System and method for hydrogen exfoliation
US20070207592A1 (en) 2006-03-03 2007-09-06 Lu James J Wafer bonding of damascene-patterned metal/adhesive redistribution layers
US7408798B2 (en) 2006-03-31 2008-08-05 International Business Machines Corporation 3-dimensional integrated circuit architecture, structure and method for fabrication thereof
US20080128901A1 (en) * 2006-11-30 2008-06-05 Peter Zurcher Micro-electro-mechanical systems device and integrated circuit device integrated in a three-dimensional semiconductor structure
US20080149832A1 (en) * 2006-12-20 2008-06-26 Miguel Zorn Scanning Probe Microscope, Nanomanipulator with Nanospool, Motor, nucleotide cassette and Gaming application
JP2009067098A (ja) 2007-09-10 2009-04-02 Harison Toshiba Lighting Corp 照明装置
JP2009267098A (ja) * 2008-04-25 2009-11-12 Denso Corp 半導体装置及びその製造方法
US7943428B2 (en) * 2008-12-24 2011-05-17 International Business Machines Corporation Bonded semiconductor substrate including a cooling mechanism
US7943423B2 (en) 2009-03-10 2011-05-17 Infineon Technologies Ag Reconfigured wafer alignment
US9406561B2 (en) 2009-04-20 2016-08-02 International Business Machines Corporation Three dimensional integrated circuit integration using dielectric bonding first and through via formation last
JP2011029609A (ja) * 2009-06-26 2011-02-10 Semiconductor Energy Lab Co Ltd Soi基板の作製方法およびsoi基板
US9076664B2 (en) * 2011-10-07 2015-07-07 Freescale Semiconductor, Inc. Stacked semiconductor die with continuous conductive vias

Similar Documents

Publication Publication Date Title
JP2016174170A5 (enExample)
JP6099794B2 (ja) 絶縁層および第2の層を有する積層されたチップセットおよびそれを形成する方法
KR102257709B1 (ko) 디바이스 기판들과 결합되는 매립된 미세 전자기계 구조들을 형성하는 방법들 및 그에 의해 형성되는 구조들
US10555088B2 (en) MEMS microphone system having an electrode assembly
US10508022B2 (en) MEMS device and process for RF and low resistance applications
JP2019528583A5 (enExample)
US8421082B1 (en) Integrated CMOS and MEMS with air dielectric method and system
US8367522B1 (en) Method and structure of integrated micro electro-mechanical systems and electronic devices using edge bond pads
US20140197531A1 (en) Compact device package
CN104821800B (zh) 一种利用双谐振单元抵消馈通量的mems压电谐振器
JP2020535697A5 (enExample)
JP2015505171A5 (enExample)
US9761557B2 (en) CMOS-MEMS integration by sequential bonding method
US10199430B2 (en) Monolithic integrated device
US20160212551A1 (en) Microelectromechanical system microphone
KR102037557B1 (ko) 통합형 음향 위상 어레이
CN107973266B (zh) 一种mems器件及制备方法、电子装置
CN107226450B (zh) 一种mems器件及其制备方法、电子装置
TWI729021B (zh) 用於隔離感測裝置的驅動及感測訊號之微電子裝置
TH2301002046A (th) วงจรแบบปรับได้ซึ่งรวมถึงวงจรฟิลเตอร์แบบบูรณาการที่คู่ควบกับค่าประจุแบบแปรผัน, และแพ็คเกจวงจรรวม (ไอซี) ที่เกี่ยวข้อง และวิธีการผลิต
Raskin SOI technologies from microelectronics to microsystems-meeting the More than Moore roadmap requirements