JP2020535697A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2020535697A5 JP2020535697A5 JP2020516404A JP2020516404A JP2020535697A5 JP 2020535697 A5 JP2020535697 A5 JP 2020535697A5 JP 2020516404 A JP2020516404 A JP 2020516404A JP 2020516404 A JP2020516404 A JP 2020516404A JP 2020535697 A5 JP2020535697 A5 JP 2020535697A5
- Authority
- JP
- Japan
- Prior art keywords
- contact
- transistor
- dielectric layer
- coupled
- lna
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201762564155P | 2017-09-27 | 2017-09-27 | |
| US62/564,155 | 2017-09-27 | ||
| US15/976,710 US10439565B2 (en) | 2017-09-27 | 2018-05-10 | Low parasitic capacitance low noise amplifier |
| US15/976,710 | 2018-05-10 | ||
| PCT/US2018/048128 WO2019067130A1 (en) | 2017-09-27 | 2018-08-27 | LOW NOISE AMPLIFIER WITH LOW PARASITE CAPACITY |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2020535697A JP2020535697A (ja) | 2020-12-03 |
| JP2020535697A5 true JP2020535697A5 (enExample) | 2021-09-24 |
| JP7364557B2 JP7364557B2 (ja) | 2023-10-18 |
Family
ID=65809274
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2020516404A Active JP7364557B2 (ja) | 2017-09-27 | 2018-08-27 | 低寄生キャパシタンス低雑音増幅器 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US10439565B2 (enExample) |
| EP (1) | EP3688806A1 (enExample) |
| JP (1) | JP7364557B2 (enExample) |
| KR (1) | KR102605453B1 (enExample) |
| CN (1) | CN111164757A (enExample) |
| BR (1) | BR112020005696B1 (enExample) |
| CA (1) | CA3073501C (enExample) |
| WO (1) | WO2019067130A1 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11239325B2 (en) * | 2020-04-28 | 2022-02-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device having backside via and method of fabricating thereof |
| US11450600B2 (en) | 2020-05-12 | 2022-09-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor devices including decoupling capacitors |
| DE102020122823B4 (de) | 2020-05-12 | 2022-06-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Halbleitervorrichtungen mit entkopplungskondensatoren |
| US11626494B2 (en) | 2020-06-17 | 2023-04-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Epitaxial backside contact |
| JP7542338B2 (ja) * | 2020-07-02 | 2024-08-30 | 株式会社東芝 | 電子回路、電流計測装置、電圧計測装置、電力変換器、およびインバータ |
| US11355487B2 (en) * | 2020-07-20 | 2022-06-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Layout designs of integrated circuits having backside routing tracks |
| JP2022025995A (ja) * | 2020-07-30 | 2022-02-10 | 株式会社東芝 | 半導体装置 |
| US11393831B2 (en) | 2020-07-31 | 2022-07-19 | Taiwan Semiconductor Manufacturing Company Limited | Optimized static random access memory |
| US11437379B2 (en) | 2020-09-18 | 2022-09-06 | Qualcomm Incorporated | Field-effect transistors (FET) circuits employing topside and backside contacts for topside and backside routing of FET power and logic signals, and related complementary metal oxide semiconductor (CMOS) circuits |
| US11404374B2 (en) | 2020-09-30 | 2022-08-02 | Qualcomm Incorporated | Circuits employing a back side-front side connection structure for coupling back side routing to front side routing, and related complementary metal oxide semiconductor (CMOS) circuits and methods |
| US12218664B2 (en) | 2020-10-21 | 2025-02-04 | Arm Limited | Backside power supply techniques |
| US12266601B2 (en) * | 2021-03-30 | 2025-04-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device structure with backside contact |
| US20220352256A1 (en) * | 2021-04-28 | 2022-11-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Backside memory integration |
| US12224286B2 (en) | 2021-09-22 | 2025-02-11 | Qualcomm Incorporated | Symmetric dual-sided MOS IC |
| CN116032221A (zh) * | 2023-03-29 | 2023-04-28 | 成都明夷电子科技有限公司 | 一种低噪声共源共栅放大器及微波系统 |
| US20250185292A1 (en) * | 2023-12-04 | 2025-06-05 | International Business Machines Corporation | Extra gate device integration with semiconductor device |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5917681B2 (ja) * | 1978-10-18 | 1984-04-23 | 日立金属株式会社 | エレベ−タベルトの緊張方法及び装置 |
| US5541442A (en) * | 1994-08-31 | 1996-07-30 | International Business Machines Corporation | Integrated compact capacitor-resistor/inductor configuration |
| US7402866B2 (en) | 2006-06-27 | 2008-07-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Backside contacts for MOS devices |
| US7666723B2 (en) | 2007-02-22 | 2010-02-23 | International Business Machines Corporation | Methods of forming wiring to transistor and related transistor |
| US8665570B2 (en) * | 2009-03-13 | 2014-03-04 | Qualcomm Incorporated | Diode having a pocket implant blocked and circuits and methods employing same |
| US8716091B2 (en) | 2010-03-30 | 2014-05-06 | International Business Machines Corporation | Structure for self-aligned silicide contacts to an upside-down FET by epitaxial source and drain |
| US9219129B2 (en) | 2012-05-10 | 2015-12-22 | International Business Machines Corporation | Inverted thin channel mosfet with self-aligned expanded source/drain |
| US8748245B1 (en) | 2013-03-27 | 2014-06-10 | Io Semiconductor, Inc. | Semiconductor-on-insulator integrated circuit with interconnect below the insulator |
| CN104241357A (zh) * | 2013-06-18 | 2014-12-24 | 中芯国际集成电路制造(上海)有限公司 | 一种晶体管、集成电路以及集成电路的制造方法 |
| US9165926B2 (en) * | 2013-10-02 | 2015-10-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dynamic threshold MOS and methods of forming the same |
| US9209305B1 (en) * | 2014-06-06 | 2015-12-08 | Stmicroelectronics, Inc. | Backside source-drain contact for integrated circuit transistor devices and method of making same |
| US10396045B2 (en) | 2015-09-27 | 2019-08-27 | Intel Corporation | Metal on both sides of the transistor integrated with magnetic inductors |
| US9755030B2 (en) | 2015-12-17 | 2017-09-05 | International Business Machines Corporation | Method for reduced source and drain contact to gate stack capacitance |
| US9755029B1 (en) | 2016-06-22 | 2017-09-05 | Qualcomm Incorporated | Switch device performance improvement through multisided biased shielding |
| US9780210B1 (en) | 2016-08-11 | 2017-10-03 | Qualcomm Incorporated | Backside semiconductor growth |
| US10420171B2 (en) | 2016-08-26 | 2019-09-17 | Qualcomm Incorporated | Semiconductor devices on two sides of an isolation layer |
-
2018
- 2018-05-10 US US15/976,710 patent/US10439565B2/en active Active
- 2018-08-27 CN CN201880062330.XA patent/CN111164757A/zh active Pending
- 2018-08-27 BR BR112020005696-0A patent/BR112020005696B1/pt active IP Right Grant
- 2018-08-27 EP EP18769006.0A patent/EP3688806A1/en active Pending
- 2018-08-27 JP JP2020516404A patent/JP7364557B2/ja active Active
- 2018-08-27 CA CA3073501A patent/CA3073501C/en active Active
- 2018-08-27 WO PCT/US2018/048128 patent/WO2019067130A1/en not_active Ceased
- 2018-08-27 KR KR1020207008405A patent/KR102605453B1/ko active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2020535697A5 (enExample) | ||
| JP2019508878A5 (enExample) | ||
| JP2019525478A5 (enExample) | ||
| JP2020535647A5 (enExample) | ||
| JP2016174170A5 (enExample) | ||
| JP6099794B2 (ja) | 絶縁層および第2の層を有する積層されたチップセットおよびそれを形成する方法 | |
| CN109314097B (zh) | 用于反向偏置开关晶体管的方法和装置 | |
| JP2008526106A5 (enExample) | ||
| JP2019528583A5 (enExample) | ||
| US9646972B2 (en) | Methods of forming buried vertical capacitors and structures formed thereby | |
| JP2019511120A5 (enExample) | ||
| JP2017512383A5 (enExample) | ||
| US10559520B2 (en) | Bulk layer transfer processing with backside silicidation | |
| CN115004560B (zh) | 阻抗匹配收发器 | |
| TW495817B (en) | RF integrated circuit layout | |
| WO2016095513A1 (zh) | 阵列基板及其制作方法、显示装置 | |
| US20200204175A1 (en) | Capacitance balance in dual sided contact switch | |
| JP2009194376A (ja) | 半導体基板製造装置 | |
| US10043752B2 (en) | Substrate contact using dual sided silicidation | |
| CN207460301U (zh) | 电子设备的壳体组件及电子设备 | |
| JP2004319611A (ja) | 音声信号処理回路およびそれを内蔵した表示装置 | |
| EP3966856B1 (en) | Semiconductor devices with low parasitic capacitance and method of their fabrication | |
| CN102449769B (zh) | 制造电子装置的设备和方法 | |
| Lin et al. | A 0.8–6 GHz Wideband Receiver Front‐End for Software‐Defined Radio | |
| KR101583207B1 (ko) | 기판 관통 비아를 이용한 신호 라우팅 |