IN2014MN01027A - - Google Patents

Info

Publication number
IN2014MN01027A
IN2014MN01027A IN1027MUN2014A IN2014MN01027A IN 2014MN01027 A IN2014MN01027 A IN 2014MN01027A IN 1027MUN2014 A IN1027MUN2014 A IN 1027MUN2014A IN 2014MN01027 A IN2014MN01027 A IN 2014MN01027A
Authority
IN
India
Prior art keywords
substrate layer
layer
wafer
sheet
circuit
Prior art date
Application number
Other languages
English (en)
Inventor
Chengjie Zuo
Changhan Yun
Sang June Park
Chi Shun Lo
Mario F Velez
Jonghae Kim
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of IN2014MN01027A publication Critical patent/IN2014MN01027A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Micromachines (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Laminated Bodies (AREA)
IN1027MUN2014 2011-11-16 2012-11-16 IN2014MN01027A (enExample)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201161560471P 2011-11-16 2011-11-16
US13/356,717 US9496255B2 (en) 2011-11-16 2012-01-24 Stacked CMOS chipset having an insulating layer and a secondary layer and method of forming same
PCT/US2012/065644 WO2013075007A1 (en) 2011-11-16 2012-11-16 Stacked chipset having an insulating layer and a secondary layer and method of forming same

Publications (1)

Publication Number Publication Date
IN2014MN01027A true IN2014MN01027A (enExample) 2015-05-01

Family

ID=48280458

Family Applications (1)

Application Number Title Priority Date Filing Date
IN1027MUN2014 IN2014MN01027A (enExample) 2011-11-16 2012-11-16

Country Status (7)

Country Link
US (1) US9496255B2 (enExample)
EP (1) EP2780942A1 (enExample)
JP (2) JP5937225B2 (enExample)
KR (2) KR20140100526A (enExample)
CN (1) CN104054175B (enExample)
IN (1) IN2014MN01027A (enExample)
WO (1) WO2013075007A1 (enExample)

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US9257407B2 (en) * 2013-10-28 2016-02-09 Qualcomm Incorporated Heterogeneous channel material integration into wafer
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US9768109B2 (en) * 2015-09-22 2017-09-19 Qualcomm Incorporated Integrated circuits (ICS) on a glass substrate
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US9831115B2 (en) 2016-02-19 2017-11-28 Sunedison Semiconductor Limited (Uen201334164H) Process flow for manufacturing semiconductor on insulator structures in parallel
SG11201806851RA (en) 2016-03-07 2018-09-27 Globalwafers Co Ltd Semiconductor on insulator structure comprising a low temperature flowable oxide layer and method of manufacture thereof
US11114332B2 (en) 2016-03-07 2021-09-07 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
US11848227B2 (en) 2016-03-07 2023-12-19 Globalwafers Co., Ltd. Method of manufacturing a semiconductor on insulator structure by a pressurized bond treatment
WO2017155806A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
KR102439602B1 (ko) 2016-06-08 2022-09-01 글로벌웨이퍼스 씨오., 엘티디. 높은 비저항의 단결정 실리콘 잉곳 및 개선된 기계적 강도를 갖는 웨이퍼
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
US20180068886A1 (en) * 2016-09-02 2018-03-08 Qualcomm Incorporated Porous semiconductor layer transfer for an integrated circuit structure
US9812580B1 (en) * 2016-09-06 2017-11-07 Qualcomm Incorporated Deep trench active device with backside body contact
EP4456146B1 (en) 2016-10-26 2026-03-25 GlobalWafers Co., Ltd. High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
SG10201913059PA (en) 2016-12-05 2020-02-27 Globalwafers Co Ltd High resistivity silicon-on-insulator structure and method of manufacture thereof
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JP6881066B2 (ja) * 2017-06-19 2021-06-02 大日本印刷株式会社 貫通電極基板および貫通電極基板の製造方法
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CN118943075A (zh) 2018-06-08 2024-11-12 环球晶圆股份有限公司 将硅薄层移转的方法
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JP2020141090A (ja) * 2019-03-01 2020-09-03 ソニーセミコンダクタソリューションズ株式会社 容量素子、半導体素子基板及び電子機器
KR102804065B1 (ko) 2020-07-13 2025-05-09 삼성전자주식회사 반도체 패키지 및 반도체 패키지의 제조 방법
CN114122134B (zh) * 2020-09-01 2023-12-22 苏州华太电子技术股份有限公司 一种射频ldmos集成器件
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CN117157246A (zh) * 2021-04-30 2023-12-01 Qorvo美国公司 竖直堆叠的mems装置和控制器装置
DE102022211198A1 (de) * 2022-10-21 2024-05-02 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren zur Herstellung eines mikromechanischen Bauelements

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Also Published As

Publication number Publication date
JP2016174170A (ja) 2016-09-29
JP5937225B2 (ja) 2016-06-22
CN104054175B (zh) 2018-03-06
KR20160044591A (ko) 2016-04-25
JP6099794B2 (ja) 2017-03-22
EP2780942A1 (en) 2014-09-24
CN104054175A (zh) 2014-09-17
US20130120951A1 (en) 2013-05-16
KR101759689B1 (ko) 2017-07-19
US9496255B2 (en) 2016-11-15
WO2013075007A1 (en) 2013-05-23
KR20140100526A (ko) 2014-08-14
JP2015503228A (ja) 2015-01-29

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