JP2016171267A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2016171267A JP2016171267A JP2015051579A JP2015051579A JP2016171267A JP 2016171267 A JP2016171267 A JP 2016171267A JP 2015051579 A JP2015051579 A JP 2015051579A JP 2015051579 A JP2015051579 A JP 2015051579A JP 2016171267 A JP2016171267 A JP 2016171267A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor region
- region
- semiconductor device
- insulating
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 431
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 4
- 229910052796 boron Inorganic materials 0.000 claims description 4
- 150000004767 nitrides Chemical class 0.000 claims description 3
- 239000005360 phosphosilicate glass Substances 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 abstract description 21
- 230000007423 decrease Effects 0.000 abstract description 14
- 239000010410 layer Substances 0.000 description 135
- 238000000034 method Methods 0.000 description 50
- 239000012535 impurity Substances 0.000 description 27
- 238000004519 manufacturing process Methods 0.000 description 21
- 239000000758 substrate Substances 0.000 description 18
- 238000005530 etching Methods 0.000 description 16
- 230000005684 electric field Effects 0.000 description 14
- 230000002829 reductive effect Effects 0.000 description 7
- 238000009623 Bosch process Methods 0.000 description 6
- 238000001020 plasma etching Methods 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 239000005380 borophosphosilicate glass Substances 0.000 description 4
- 239000011810 insulating material Substances 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 3
- 229960000909 sulfur hexafluoride Drugs 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- MXSJNBRAMXILSE-UHFFFAOYSA-N [Si].[P].[B] Chemical compound [Si].[P].[B] MXSJNBRAMXILSE-UHFFFAOYSA-N 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- -1 for example Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 230000000670 limiting effect Effects 0.000 description 1
- QLOAVXSYZAJECW-UHFFFAOYSA-N methane;molecular fluorine Chemical compound C.FF QLOAVXSYZAJECW-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000036961 partial effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66136—PN junction diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8613—Mesa PN junction diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0661—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1041—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
- H01L29/1045—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Led Devices (AREA)
- Pressure Sensors (AREA)
Abstract
Description
従って、半導体装置の耐圧の低下を抑制できる技術が求められている。
第2半導体領域は、第1半導体領域の上に設けられている。
第1絶縁層は、第2半導体領域に接している。第1絶縁層は、第1半導体領域の少なくとも一部および第2半導体領域の少なくとも一部を囲んでいる。
第1絶縁領域は、第1絶縁層の少なくとも一部を囲んでいる。
なお、図面は模式的または概念的なものであり、各部分の厚みと幅との関係、部分間の大きさの比率などは、必ずしも現実のものと同一とは限らない。また、同じ部分を表す場合であっても、図面により互いの寸法や比率が異なって表される場合もある。
また、本願明細書と各図において、既に説明したものと同様の要素には同一の符号を付して詳細な説明は適宜省略する。
各実施形態の説明には、XYZ直交座標系を用いる。例えば、各実施形態に係る半導体装置を作製する際に用いられる基板の主面に対して平行な方向であって相互に直交する2方向をX方向(第2方向)及びY方向とする。そして、これらX方向及びY方向の双方に対して直交する方向をZ方向(第1方向)とする。
各実施形態の説明において、n+、n、n−及びp+、p、p−の表記は、各導電形における不純物濃度の相対的な高低を表す。すなわち、n+はnよりもn形の不純物濃度が相対的に高く、n−はnよりもn形の不純物濃度が相対的に低いことを示す。また、p+はpよりもp形の不純物濃度が相対的に高く、p−はpよりもp形の不純物濃度が相対的に低いことを示す。
以下で説明する各実施形態について、各半導体領域のp形とn形を反転させて各実施形態を実施してもよい。
図1は、第1実施形態に係る半導体装置100の平面図である。
図2は、図1のA−A´断面図である。
図3は、図2の一部を拡大した断面図である。
なお、図1では、絶縁部10の一部、アノード電極22、および絶縁層31が省略されている。
半導体装置100は、n+形半導体領域1(第1導電形の第3半導体領域)と、n−形半導体領域2(第1半導体領域)と、p形半導体領域3(第2導電形の第2半導体領域)と、p+形半導体領域4と、第1絶縁層11と、第1絶縁領域12と、カソード電極21と、アノード電極22と、絶縁層31と、を有する。
なお、以降では、p形半導体領域3から第1絶縁層11に向かう方向を、第4方向とよぶ。第4方向は、例えば、X−Y面に沿った方向である。
図4、図6、および図12は、第1実施形態に係る半導体装置100の製造工程を表す工程平面図である。
図5、図7〜図11、図13、および図14は、第1実施形態に係る半導体装置100の製造工程を表す工程断面図である。
図8〜図11および図14は、図4、図6、および図12のA−A´線が付された位置に対応する位置における断面図である。
以下の説明では、基板Sの主成分がSiである場合について、説明する。
本実施形態によれば、半導体装置の耐圧の低下を抑制することが可能となる。
この理由について、以下で詳細に説明する。
図15は、第1実施形態に係る半導体装置100の特性を例示する拡大断面図である。
図15における破線は、アノード電極22に、カソード電極21に対して正の電圧が印加されている状態における等電位線を模式的に表したものである。
図16は、第2実施形態に係る半導体装置200の一部を拡大した断面図である。
図16は、半導体装置200のX−Z断面の一部を拡大したものであり、半導体装置200のY−Z断面における構造は、例えば、図16に表す構造と同じである。
図17は、第2実施形態に係る半導体装置200の製造工程を表す工程断面図である。
なお、第1絶縁層11の膜厚(第4方向における厚み)は、絶縁層13aをリフローさせる際、絶縁層13aから各半導体領域へのボロンおよびリンの拡散を抑制するために、0.5μm以上であることが望ましい。
図18は、第3実施形態に係る半導体装置300の一部を拡大した断面図である。
図18は、半導体装置300のX−Z断面の一部を拡大したものであり、半導体装置300のY−Z断面における構造は、例えば、図18に表す構造と同じである。
図19は、第4実施形態に係る半導体装置400の断面図である。
図19は、半導体装置400のX−Z断面における様子であり、半導体装置400のY−Z断面における構造は、例えば、図19に表すX−Z断面における構造と同じである。
まず、図4〜図13に表す工程と同様の工程を行い、開口OP2を形成する。続いて、開口OP2の内壁に、例えばCVD法を用いて窒化シリコン層を形成する。その後、アノード電極22の上に形成された、余分な窒化シリコン層を除去し、図14に表す工程と同様の工程を行うことで、半導体装置400が得られる。
図20は、第5実施形態に係る半導体装置500の断面図である。
図20は、半導体装置500のX−Z断面における様子を表している。半導体装置500のY−Z断面における構造は、例えば、X−Z断面における構造と同じでありうる。
半導体装置500は、例えば、以下の方法により作製される。
図22は、第6実施形態に係る半導体装置600の断面図である。
図22は、半導体装置600のX−Z断面における様子を表している。半導体装置600のY−Z断面における構造は、例えば、X−Z断面における構造と同じである。
図23は、図22の一部を拡大した断面図である。
図24は、第7実施形態に係る半導体装置700の断面図である。
図24は、半導体装置700のX−Z断面における様子を表している。半導体装置700のY−Z断面における構造は、例えば、X−Z断面における構造と同じである。
半導体装置700は、例えば、以下の製造方法により作製される。
次に、図25に表すように、開口OP1を通して、n−形半導体領域2の露出した部分に、p形不純物をイオン注入する。この工程により、p−形半導体領域5が形成される。
図26は、第8実施形態に係る半導体装置800の断面図である。
図27は、図26の一部を拡大した断面図である。図26は、半導体装置800のX−Z断面であり、半導体装置800のY−Z断面における構造も、図26と同様の構造を有しうる。
まず、図4および図5に表す工程と同様の工程を行い、絶縁層31aおよび絶縁層32を形成する。続いて、開口OP1を形成する。このとき、例えば、ボッシュプロセスを用いて、側壁保護膜の膜厚を厚くし、かつ等方性エッチングのエッチングレートを大きくすることで、−Z方向に向けて幅が広くなる開口OP1を形成することができる。
図28は、第9実施形態に係る半導体装置900の断面図である。
半導体装置900は、例えば、MOSFETである。
半導体装置900は、n+形ドレイン領域1(第1導電形の第3半導体領域)と、n−形半導体領域2(第1半導体領域)と、p形ベース領域3(第2導電形の第2半導体領域)と、n+形ソース領域5と、ゲート絶縁層6と、ゲート電極7と、第1絶縁層11と、第1絶縁領域12と、ドレイン電極21と、ソース電極22と、絶縁層31と、を有する。
図29は、第10実施形態に係る半導体装置1000の断面図である。
半導体装置1000は、例えば、IGBTである。
半導体装置1000は、p+形コレクタ領域8と、n形半導体領域1a(第1導電形の第3半導体領域)と、n−形半導体領域2(第1半導体領域)と、p形ベース領域3(第2導電形の第2半導体領域)と、n+形エミッタ領域5と、p+形コンタクト領域9と、ゲート絶縁層6と、ゲート電極7と、第1絶縁層11、第1絶縁領域12、コレクタ電極21と、エミッタ電極22と、絶縁層31と、を有する。
Claims (15)
- 第1導電形の第1半導体領域と、
前記第1半導体領域の上に設けられた第2導電形の第2半導体領域と、
前記第2半導体領域に接し、前記第1半導体領域の少なくとも一部および前記第2半導体領域の少なくとも一部を囲む第1絶縁層と、
前記第1絶縁層の少なくとも一部を囲む第1絶縁領域と、
を備えた半導体装置。 - 第1導電形の第3半導体領域をさらに備え、
前記第3半導体領域の第1導電形のキャリア濃度は、前記第1半導体領域の第1導電形のキャリア濃度よりも高く、
前記第1半導体領域は、前記第3半導体領域の一部の上に設けられ、
前記第1絶縁層の一部は、前記第1半導体領域の一部を囲む請求項1記載の半導体装置。 - 前記第1絶縁層は、
前記第1半導体領域の少なくとも一部および前記第2半導体領域の少なくとも一部を囲む第1部分と、
前記第1部分と、前記第1半導体領域から前記第2半導体領域に向かう第1方向と直交する方向に離間して設けられ、前記第1部分の少なくとも一部を囲む第2部分と、
を有し、
前記第1絶縁領域は、前記第1部分と前記第2部分との間に設けられた請求項2記載の半導体装置。 - 前記第1部分の厚みは、前記第2部分の厚みよりも厚い請求項3記載の半導体装置。
- 前記第3半導体領域の、前記第1方向に直交する第2方向における長さは、前記第1半導体領域の、前記第2方向における長さより長い請求項3または4に記載の半導体装置。
- 前記第3半導体領域の前記第2方向における前記長さは、前記第1絶縁層の前記第2方向における一方の端部から他方の端部までの距離よりも長い請求項5記載の半導体装置。
- 前記第1絶縁領域は、エアギャップである請求項3〜6のいずれか1つに記載の半導体装置。
- 前記第1部分と前記第2部分との間に設けられた第2絶縁領域をさらに備え、
前記第2絶縁領域の少なくとも一部は、前記第1絶縁領域の上に設けられ、
前記第2絶縁領域は、ボロンリン珪酸ガラスを含む請求項7記載の半導体装置。 - 前記第1半導体領域から前記第2半導体領域に向かう第1方向において、前記第1半導体領域の一部と前記絶縁部の一部との間に、間隙が設けられた請求項2〜8のいずれか1つに記載の半導体装置。
- 前記第1絶縁層の少なくとも一部を囲む第2絶縁層をさらに有し、
前記第2絶縁層は、窒化物を含む請求項1〜9のいずれか1つに記載の半導体装置。 - 前記第2絶縁層の少なくとも一部は、前記第1絶縁層と前記第1絶縁領域との間に設けられ、
前記第2絶縁層は、窒化シリコンを含む請求項10記載の半導体装置。 - 前記第2半導体領域の上に設けられた第1電極をさらに備え、
前記第1電極の一部は、前記第1絶縁層の上に設けられた請求項1〜11のいずれか1つに記載の半導体装置。 - 前記第1半導体領域の少なくとも一部と前記第1絶縁層の少なくとも一部との間に設けられた第2導電形の第4半導体領域をさらに備えた請求項1〜12のいずれか1つに記載の半導体装置。
- 前記第4半導体領域の第2導電形のキャリア濃度は、前記第2半導体領域の第2導電形のキャリア濃度よりも低い請求項13記載の半導体装置。
- 前記第1半導体領域の、前記第1半導体領域から前記第2半導体領域に向かう第1方向と直交する第2方向における長さは、前記第2半導体領域の前記第2方向における長さよりも短い請求項1〜14のいずれか1つに記載の半導体装置。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015051579A JP6317694B2 (ja) | 2015-03-16 | 2015-03-16 | 半導体装置 |
KR1020150108040A KR20160111302A (ko) | 2015-03-16 | 2015-07-30 | 반도체 장치 |
CN201510553416.0A CN105990451B (zh) | 2015-03-16 | 2015-09-02 | 半导体装置 |
TW104128893A TW201635537A (zh) | 2015-03-16 | 2015-09-02 | 半導體裝置 |
US14/846,916 US10141399B2 (en) | 2015-03-16 | 2015-09-07 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015051579A JP6317694B2 (ja) | 2015-03-16 | 2015-03-16 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016171267A true JP2016171267A (ja) | 2016-09-23 |
JP6317694B2 JP6317694B2 (ja) | 2018-04-25 |
Family
ID=56923938
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015051579A Expired - Fee Related JP6317694B2 (ja) | 2015-03-16 | 2015-03-16 | 半導体装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US10141399B2 (ja) |
JP (1) | JP6317694B2 (ja) |
KR (1) | KR20160111302A (ja) |
CN (1) | CN105990451B (ja) |
TW (1) | TW201635537A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9865680B2 (en) | 2016-03-14 | 2018-01-09 | Kabushiki Kaisha Toshiba | Semiconductor device with peripheral void space and method of making the same |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10511135B2 (en) | 2017-12-19 | 2019-12-17 | Raytheon Company | Laser system with mechanically-robust monolithic fused planar waveguide (PWG) structure |
US11309349B2 (en) * | 2018-08-21 | 2022-04-19 | Hewlett-Packard Development Company, L.P. | P-type semiconductor layers coupled to N-type semiconductor layers |
JP7471250B2 (ja) | 2021-03-19 | 2024-04-19 | 株式会社東芝 | 半導体装置 |
EP4131422A1 (en) * | 2021-08-03 | 2023-02-08 | Infineon Technologies Austria AG | Semiconductor device |
CN114226984B (zh) * | 2021-12-06 | 2022-11-18 | 湖北三维半导体集成创新中心有限责任公司 | 一种晶圆的切割方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005136064A (ja) * | 2003-10-29 | 2005-05-26 | Fuji Electric Holdings Co Ltd | 半導体装置 |
WO2008044801A1 (fr) * | 2006-10-13 | 2008-04-17 | Sanyo Electric Co., Ltd. | Dispositif semiconducteur et procédé de fabrication de celui-ci |
JP2009206502A (ja) * | 2008-01-29 | 2009-09-10 | Sanyo Electric Co Ltd | メサ型半導体装置及びその製造方法 |
JP2012009489A (ja) * | 2010-06-22 | 2012-01-12 | Denso Corp | 半導体装置の製造方法および半導体装置 |
JP2013080893A (ja) * | 2011-09-21 | 2013-05-02 | Toshiba Corp | 半導体装置 |
JP2015019014A (ja) * | 2013-07-12 | 2015-01-29 | 住友電気工業株式会社 | 半導体装置およびその製造方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3008480B2 (ja) | 1990-11-05 | 2000-02-14 | 日産自動車株式会社 | 半導体装置 |
JP3207559B2 (ja) | 1992-10-27 | 2001-09-10 | 株式会社東芝 | Mos駆動型半導体装置 |
JP2000332099A (ja) | 1999-05-21 | 2000-11-30 | Matsushita Electronics Industry Corp | 半導体装置およびその製造方法 |
JP2002289683A (ja) | 2001-03-28 | 2002-10-04 | Nec Corp | トレンチ分離構造の形成方法および半導体装置 |
US7781310B2 (en) | 2007-08-07 | 2010-08-24 | Semiconductor Components Industries, Llc | Semiconductor die singulation method |
TW201007836A (en) * | 2008-04-11 | 2010-02-16 | Sandisk 3D Llc | Methods for etching carbon nano-tube films for use in non-volatile memories |
JP2009289791A (ja) * | 2008-05-27 | 2009-12-10 | Nec Electronics Corp | 半導体装置 |
JP5729745B2 (ja) * | 2009-09-15 | 2015-06-03 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
CN103022088A (zh) * | 2011-09-21 | 2013-04-03 | 株式会社东芝 | 具有沟道结构体的半导体装置及其制造方法 |
JP5951213B2 (ja) | 2011-10-11 | 2016-07-13 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法及び半導体装置 |
JP5978781B2 (ja) | 2012-06-05 | 2016-08-24 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
-
2015
- 2015-03-16 JP JP2015051579A patent/JP6317694B2/ja not_active Expired - Fee Related
- 2015-07-30 KR KR1020150108040A patent/KR20160111302A/ko not_active Application Discontinuation
- 2015-09-02 CN CN201510553416.0A patent/CN105990451B/zh not_active Expired - Fee Related
- 2015-09-02 TW TW104128893A patent/TW201635537A/zh unknown
- 2015-09-07 US US14/846,916 patent/US10141399B2/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005136064A (ja) * | 2003-10-29 | 2005-05-26 | Fuji Electric Holdings Co Ltd | 半導体装置 |
WO2008044801A1 (fr) * | 2006-10-13 | 2008-04-17 | Sanyo Electric Co., Ltd. | Dispositif semiconducteur et procédé de fabrication de celui-ci |
JP2009206502A (ja) * | 2008-01-29 | 2009-09-10 | Sanyo Electric Co Ltd | メサ型半導体装置及びその製造方法 |
JP2012009489A (ja) * | 2010-06-22 | 2012-01-12 | Denso Corp | 半導体装置の製造方法および半導体装置 |
JP2013080893A (ja) * | 2011-09-21 | 2013-05-02 | Toshiba Corp | 半導体装置 |
JP2015019014A (ja) * | 2013-07-12 | 2015-01-29 | 住友電気工業株式会社 | 半導体装置およびその製造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9865680B2 (en) | 2016-03-14 | 2018-01-09 | Kabushiki Kaisha Toshiba | Semiconductor device with peripheral void space and method of making the same |
Also Published As
Publication number | Publication date |
---|---|
CN105990451B (zh) | 2019-06-11 |
JP6317694B2 (ja) | 2018-04-25 |
CN105990451A (zh) | 2016-10-05 |
US10141399B2 (en) | 2018-11-27 |
TW201635537A (zh) | 2016-10-01 |
US20160276430A1 (en) | 2016-09-22 |
KR20160111302A (ko) | 2016-09-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6317694B2 (ja) | 半導体装置 | |
JP6426642B2 (ja) | 半導体装置 | |
US10020391B2 (en) | Semiconductor device and manufacturing method of the same | |
JP6378220B2 (ja) | 半導体装置 | |
JPWO2017043608A1 (ja) | 半導体装置 | |
US9653557B2 (en) | Semiconductor device | |
KR101339265B1 (ko) | 반도체 소자의 제조 방법 | |
US20150115314A1 (en) | Semiconductor device and manufacturing method of the same | |
KR20110108256A (ko) | 반도체장치와 그 제조방법 | |
US9871131B2 (en) | Semiconductor device with insulating section of varying thickness | |
CN104733301A (zh) | 用于制造具有斜切边缘终止的半导体器件的方法 | |
JP2016035989A (ja) | 半導体装置 | |
JP2016134546A (ja) | 半導体装置と、その製造方法 | |
TW201640613A (zh) | 半導體裝置及半導體裝置之製造方法 | |
US9508798B2 (en) | Semiconductor device | |
JP6970068B2 (ja) | 半導体装置 | |
JP2016167559A (ja) | 半導体装置 | |
JP2012160601A (ja) | 半導体装置の製造方法 | |
KR20120082441A (ko) | 개선된 트렌치 종단 구조 | |
JP2012174852A (ja) | 半導体装置およびその製造方法 | |
JP2016174044A (ja) | 半導体装置の製造方法 | |
CN109390387B (zh) | 半导体器件及其制造方法 | |
JP2015177041A (ja) | 半導体装置 | |
JP2014154609A (ja) | 半導体装置 | |
JP2011082411A (ja) | 半導体素子の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20170307 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A712 Effective date: 20170911 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20170912 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20171031 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20171205 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180205 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20180301 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20180330 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6317694 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
LAPS | Cancellation because of no payment of annual fees |