JP2016001515A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2016001515A5 JP2016001515A5 JP2015185314A JP2015185314A JP2016001515A5 JP 2016001515 A5 JP2016001515 A5 JP 2016001515A5 JP 2015185314 A JP2015185314 A JP 2015185314A JP 2015185314 A JP2015185314 A JP 2015185314A JP 2016001515 A5 JP2016001515 A5 JP 2016001515A5
- Authority
- JP
- Japan
- Prior art keywords
- bank
- valid data
- associative memory
- power
- selectively
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims 10
- 238000007726 management method Methods 0.000 claims 4
- 238000013500 data storage Methods 0.000 claims 2
- 241000257465 Echinoidea Species 0.000 claims 1
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/862,277 | 2010-08-24 | ||
| US12/862,277 US8984217B2 (en) | 2010-08-24 | 2010-08-24 | System and method of reducing power usage of a content addressable memory |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013525013A Division JP2013537680A (ja) | 2010-08-24 | 2011-08-24 | 連想メモリの電力使用量を低減するシステムおよび方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016001515A JP2016001515A (ja) | 2016-01-07 |
| JP2016001515A5 true JP2016001515A5 (cg-RX-API-DMAC7.html) | 2016-07-21 |
| JP6081546B2 JP6081546B2 (ja) | 2017-02-15 |
Family
ID=44515072
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013525013A Withdrawn JP2013537680A (ja) | 2010-08-24 | 2011-08-24 | 連想メモリの電力使用量を低減するシステムおよび方法 |
| JP2015185314A Active JP6081546B2 (ja) | 2010-08-24 | 2015-09-18 | 連想メモリの電力使用量を低減するシステムおよび方法 |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013525013A Withdrawn JP2013537680A (ja) | 2010-08-24 | 2011-08-24 | 連想メモリの電力使用量を低減するシステムおよび方法 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US8984217B2 (cg-RX-API-DMAC7.html) |
| EP (1) | EP2609595B1 (cg-RX-API-DMAC7.html) |
| JP (2) | JP2013537680A (cg-RX-API-DMAC7.html) |
| KR (1) | KR101654118B1 (cg-RX-API-DMAC7.html) |
| CN (1) | CN103069497B (cg-RX-API-DMAC7.html) |
| ES (1) | ES2583328T3 (cg-RX-API-DMAC7.html) |
| HU (1) | HUE028001T2 (cg-RX-API-DMAC7.html) |
| WO (1) | WO2012027429A1 (cg-RX-API-DMAC7.html) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9214231B2 (en) * | 2013-01-31 | 2015-12-15 | Hewlett-Packard Development Company, L.P. | Crossbar memory to provide content addressable functionality |
| US20150279463A1 (en) * | 2014-03-31 | 2015-10-01 | Dell Products, L.P. | Adjustable non-volatile memory regions of dram-based memory module |
| JP2017097940A (ja) * | 2015-11-26 | 2017-06-01 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP6659486B2 (ja) | 2016-07-20 | 2020-03-04 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP2019008845A (ja) * | 2017-06-22 | 2019-01-17 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US11347514B2 (en) * | 2019-02-15 | 2022-05-31 | Apple Inc. | Content-addressable memory filtering based on microarchitectural state |
| US10922020B2 (en) * | 2019-04-12 | 2021-02-16 | Micron Technology, Inc. | Writing and querying operations in content addressable memory systems with content addressable memory buffers |
| US11017857B2 (en) * | 2019-07-15 | 2021-05-25 | Micron Technology, Inc. | Ranged content-addressable memory |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4246812B2 (ja) * | 1997-06-12 | 2009-04-02 | パナソニック株式会社 | 半導体回路及びその制御方法 |
| US6341327B1 (en) | 1998-08-13 | 2002-01-22 | Intel Corporation | Content addressable memory addressable by redundant form input |
| JP2000149573A (ja) | 1998-11-04 | 2000-05-30 | Internatl Business Mach Corp <Ibm> | 連想メモリ及び連想メモリのデータ検索方法 |
| JP3478749B2 (ja) | 1999-02-05 | 2003-12-15 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 連想メモリ（ｃａｍ）のワードマッチラインのプリチャージ回路および方法 |
| JP2001023380A (ja) * | 1999-07-12 | 2001-01-26 | Kawasaki Steel Corp | 連想メモリ |
| JP2001167585A (ja) | 1999-12-09 | 2001-06-22 | Toshiba Corp | 連想記憶装置 |
| JP2002124088A (ja) * | 2000-10-13 | 2002-04-26 | Kawasaki Microelectronics Kk | 連想メモリ装置およびそのメモリデータ移動方法 |
| JP2003045189A (ja) | 2001-07-31 | 2003-02-14 | Fujitsu Ltd | 半導体メモリ |
| US7401180B1 (en) * | 2001-12-27 | 2008-07-15 | Netlogic Microsystems, Inc. | Content addressable memory (CAM) device having selectable access and method therefor |
| US7100013B1 (en) * | 2002-08-30 | 2006-08-29 | Nvidia Corporation | Method and apparatus for partial memory power shutoff |
| JP2004164395A (ja) | 2002-11-14 | 2004-06-10 | Renesas Technology Corp | アドレス変換装置 |
| US20040128574A1 (en) * | 2002-12-31 | 2004-07-01 | Franco Ricci | Reducing integrated circuit power consumption |
| WO2004104841A1 (ja) | 2003-05-21 | 2004-12-02 | Fujitsu Limited | アドレス変換バッファの電力制御方法及びその装置 |
| JP2005011434A (ja) * | 2003-06-19 | 2005-01-13 | Mitsubishi Electric Corp | ダイナミックメモリ制御装置及びこれを用いた携帯端末 |
| JP2006040089A (ja) * | 2004-07-29 | 2006-02-09 | Fujitsu Ltd | セカンドキャッシュ駆動制御回路、セカンドキャッシュ、ｒａｍ、及びセカンドキャッシュ駆動制御方法 |
| US20080005516A1 (en) * | 2006-06-30 | 2008-01-03 | Meinschein Robert J | Memory power management through high-speed intra-memory data transfer and dynamic memory address remapping |
| US7616468B2 (en) | 2006-08-04 | 2009-11-10 | Qualcomm Incorporated | Method and apparatus for reducing power consumption in a content addressable memory |
| KR100911189B1 (ko) * | 2007-06-11 | 2009-08-06 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 클럭 제어 회로 |
| JP2010108381A (ja) * | 2008-10-31 | 2010-05-13 | Fujitsu Ltd | 集積回路、集積回路の制御方法および半導体デバイス |
| CN102473453B (zh) | 2009-09-02 | 2014-10-22 | 松下电器产业株式会社 | 半导体存储装置 |
-
2010
- 2010-08-24 US US12/862,277 patent/US8984217B2/en active Active
-
2011
- 2011-08-24 ES ES11749322.1T patent/ES2583328T3/es active Active
- 2011-08-24 WO PCT/US2011/048892 patent/WO2012027429A1/en not_active Ceased
- 2011-08-24 EP EP11749322.1A patent/EP2609595B1/en active Active
- 2011-08-24 KR KR1020137007340A patent/KR101654118B1/ko active Active
- 2011-08-24 CN CN201180039036.5A patent/CN103069497B/zh active Active
- 2011-08-24 JP JP2013525013A patent/JP2013537680A/ja not_active Withdrawn
- 2011-08-24 HU HUE11749322A patent/HUE028001T2/en unknown
-
2015
- 2015-09-18 JP JP2015185314A patent/JP6081546B2/ja active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2016001515A5 (cg-RX-API-DMAC7.html) | ||
| RU2010147827A (ru) | Системы и способы для снижения потребления динамической мощности при работе электронного запоминающего устройства | |
| US8954672B2 (en) | System and method for cache organization in row-based memories | |
| KR102421311B1 (ko) | 태그 매칭 명령에 응답하는 저장회로 | |
| CN104850501B (zh) | 一种ddr存储器访存地址映射方法及访存地址映射单元 | |
| JP2019505910A (ja) | 不揮発性メモリの複数区画の同時アクセスのための装置及び方法 | |
| JP2016526748A5 (cg-RX-API-DMAC7.html) | ||
| JP6081546B2 (ja) | 連想メモリの電力使用量を低減するシステムおよび方法 | |
| JP2014220808A5 (cg-RX-API-DMAC7.html) | ||
| WO2017039689A1 (en) | Data tables in content addressable memory | |
| US20120317374A1 (en) | SRAM Multiplexing Apparatus | |
| US9336905B2 (en) | Repair circuit and semiconductor apparatus using the same | |
| Wang et al. | Optimizing MLC-based STT-RAM caches by dynamic block size reconfiguration | |
| CN104484129A (zh) | 一读一写存储器、多读多写存储器及其读写方法 | |
| TW201908980A (zh) | 混合式高速快取記憶體及用於縮短其延遲之方法 | |
| CN104808950A (zh) | 对嵌入式存储器元件的模式依赖性访问 | |
| US20120233394A1 (en) | Memory controller and a controlling method adaptable to dram | |
| US9747970B2 (en) | Refresh circuit | |
| CN103810117A (zh) | 处理器用指令存储系统 | |
| KR102877772B1 (ko) | 로우 해머 방지 회로를 포함하는 메모리 장치 및 이의 동작 방법 | |
| CN103810116A (zh) | 用于嵌入式系统的指令存储装置 | |
| CN102193875B (zh) | 多核下基于Cache划分的自适应路预测算法 | |
| CN103077133B (zh) | 提供可变长度高速缓存线的高速缓存器控制器及方法 | |
| JP2014523600A5 (cg-RX-API-DMAC7.html) | ||
| CN103810122A (zh) | 用于嵌入式系统的高速缓存器 |