JP2015532534A5 - - Google Patents
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- Publication number
- JP2015532534A5 JP2015532534A5 JP2015535786A JP2015535786A JP2015532534A5 JP 2015532534 A5 JP2015532534 A5 JP 2015532534A5 JP 2015535786 A JP2015535786 A JP 2015535786A JP 2015535786 A JP2015535786 A JP 2015535786A JP 2015532534 A5 JP2015532534 A5 JP 2015532534A5
- Authority
- JP
- Japan
- Prior art keywords
- die
- fuse
- node
- ground
- esd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims 13
- 230000007704 transition Effects 0.000 claims 8
- 230000008878 coupling Effects 0.000 claims 3
- 238000010168 coupling process Methods 0.000 claims 3
- 238000005859 coupling reaction Methods 0.000 claims 3
- 239000000758 substrate Substances 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 1
- 229920005591 polysilicon Polymers 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/646,109 US9184130B2 (en) | 2012-10-05 | 2012-10-05 | Electrostatic protection for stacked multi-chip integrated circuits |
| US13/646,109 | 2012-10-05 | ||
| PCT/US2013/063297 WO2014055777A1 (en) | 2012-10-05 | 2013-10-03 | Electrostatic protection for stacked multi-chip integrated circuits |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2015532534A JP2015532534A (ja) | 2015-11-09 |
| JP2015532534A5 true JP2015532534A5 (https=) | 2016-03-03 |
| JP5972473B2 JP5972473B2 (ja) | 2016-08-17 |
Family
ID=49448293
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015535786A Active JP5972473B2 (ja) | 2012-10-05 | 2013-10-03 | スタック型マルチチップ集積回路の静電気保護 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9184130B2 (https=) |
| EP (1) | EP2904638B1 (https=) |
| JP (1) | JP5972473B2 (https=) |
| KR (1) | KR101671367B1 (https=) |
| CN (1) | CN104737288B (https=) |
| WO (1) | WO2014055777A1 (https=) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9184130B2 (en) * | 2012-10-05 | 2015-11-10 | Qualcomm Incorporated | Electrostatic protection for stacked multi-chip integrated circuits |
| JP5543567B2 (ja) * | 2012-10-22 | 2014-07-09 | 誠 雫石 | 半導体素子の製造方法 |
| KR102341750B1 (ko) | 2015-06-30 | 2021-12-23 | 삼성전자주식회사 | 반도체 패키지 및 이의 제조 방법 |
| KR102482023B1 (ko) | 2016-01-28 | 2022-12-28 | 삼성전자주식회사 | 적층 메모리 칩 전기적 단락 검출 장치 및 방법 |
| US10147688B2 (en) | 2016-02-25 | 2018-12-04 | Allegro Microsystems, Llc | Integrated circuit device with overvoltage discharge protection |
| CN107622999B (zh) * | 2016-07-15 | 2020-06-02 | 中芯国际集成电路制造(上海)有限公司 | 静电放电保护电路 |
| US9941224B2 (en) | 2016-08-24 | 2018-04-10 | Allegro Microsystems, Llc | Multi-die integrated circuit device with capacitive overvoltage protection |
| US10145904B2 (en) * | 2016-08-24 | 2018-12-04 | Allegro Microsystems, Llc | Multi-die integrated circuit device with overvoltage protection |
| CN107799502B (zh) * | 2016-09-05 | 2020-03-10 | 中芯国际集成电路制造(上海)有限公司 | 保护电路和集成电路 |
| US10325906B2 (en) * | 2016-09-23 | 2019-06-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | ESD testing structure, method of using same and method of forming same |
| JP2018133503A (ja) | 2017-02-16 | 2018-08-23 | 東芝メモリ株式会社 | 半導体記憶装置 |
| US10552564B1 (en) * | 2018-06-19 | 2020-02-04 | Cadence Design Systems, Inc. | Determining worst potential failure instances using full chip ESD analysis |
| DE102021101251A1 (de) | 2020-03-31 | 2021-09-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Schutz vor antenneneffekten und schutz vor elektrostatischen entladungen für dreidimensionale integrierte schaltkreise |
| US11437708B2 (en) * | 2020-03-31 | 2022-09-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Antenna effect protection and electrostatic discharge protection for three-dimensional integrated circuit |
| FR3109666B1 (fr) * | 2020-04-27 | 2026-01-02 | 3D Plus | Procédé de fabrication d’un module électronique compatible hautes fréquences |
| CN112349655B (zh) * | 2020-10-21 | 2021-10-19 | 长江存储科技有限责任公司 | 一种半导体器件及其安装结构、封装模具和制作方法 |
| US11695375B2 (en) * | 2020-12-03 | 2023-07-04 | Nxp Usa, Inc. | Power amplifier with a power transistor and an electrostatic discharge protection circuit on separate substrates |
| US11973057B2 (en) | 2020-12-15 | 2024-04-30 | Analog Devices, Inc. | Through-silicon transmission lines and other structures enabled by same |
| FR3120160B1 (fr) * | 2021-02-23 | 2023-11-03 | Commissariat Energie Atomique | Procédé de protection d’un étage supérieur de composants électroniques d’un circuit intégré contre l’effet d’antenne |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5913354A (ja) | 1982-07-13 | 1984-01-24 | Toshiba Corp | 半導体装置 |
| JPS59134863A (ja) * | 1982-12-28 | 1984-08-02 | Fujitsu Ltd | 静電破壊防止回路 |
| JPH02146762A (ja) * | 1988-11-28 | 1990-06-05 | Nec Corp | 半導体集積回路装置 |
| US5807791A (en) | 1995-02-22 | 1998-09-15 | International Business Machines Corporation | Methods for fabricating multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes |
| US6141245A (en) * | 1999-04-30 | 2000-10-31 | International Business Machines Corporation | Impedance control using fuses |
| US6327125B1 (en) | 1999-12-22 | 2001-12-04 | Philips Electronics North America Corporation | Integrated circuit with removable ESD protection |
| US6556409B1 (en) | 2000-08-31 | 2003-04-29 | Agere Systems Inc. | Integrated circuit including ESD circuits for a multi-chip module and a method therefor |
| JP2003324151A (ja) | 2002-04-26 | 2003-11-14 | Toshiba Microelectronics Corp | 半導体集積回路装置、実装基板装置、及び実装基板装置の配線切断方法 |
| WO2006028231A1 (en) * | 2004-09-10 | 2006-03-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| KR100948520B1 (ko) * | 2006-08-30 | 2010-03-23 | 삼성전자주식회사 | 정전기 특성을 개선한 증폭기 |
| US7772124B2 (en) * | 2008-06-17 | 2010-08-10 | International Business Machines Corporation | Method of manufacturing a through-silicon-via on-chip passive MMW bandpass filter |
| US8698139B2 (en) * | 2008-11-25 | 2014-04-15 | Qualcomm Incorporated | Die-to-die power consumption optimization |
| JP2010129958A (ja) * | 2008-12-01 | 2010-06-10 | Seiko Epson Corp | 半導体装置及び半導体装置の製造方法 |
| US9184130B2 (en) * | 2012-10-05 | 2015-11-10 | Qualcomm Incorporated | Electrostatic protection for stacked multi-chip integrated circuits |
-
2012
- 2012-10-05 US US13/646,109 patent/US9184130B2/en active Active
-
2013
- 2013-10-03 KR KR1020157010779A patent/KR101671367B1/ko active Active
- 2013-10-03 EP EP13779997.9A patent/EP2904638B1/en active Active
- 2013-10-03 CN CN201380052136.0A patent/CN104737288B/zh active Active
- 2013-10-03 JP JP2015535786A patent/JP5972473B2/ja active Active
- 2013-10-03 WO PCT/US2013/063297 patent/WO2014055777A1/en not_active Ceased
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