JP2014510402A - シリコン・ナノチューブmosfet - Google Patents
シリコン・ナノチューブmosfet Download PDFInfo
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- H01L29/76—Unipolar devices, e.g. field effect transistors
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Abstract
【解決手段】 本発明のナノチューブMOSFETデバイスは、良好な短チャネル効果を維持し、他に負けない駆動電流をもたらしながら・デバイスのスケーリング・ロードマップを拡張する。ナノチューブMOSFETデバイスは、チューブ状エピタキシャル成長シリコン層によって互いに分離された同心のチューブ状内側ゲート及び外側ゲートと、これらゲートを囲むそれぞれスペーサによって分離されたソース及びドレインとを含む。また、ナノチューブMOSFETデバイスは、基板上に円筒状Si層を形成することと、円筒状Si層を囲む、底部スペーサと上部スペーサとの間に配置された外側ゲートを形成することと、円筒状Si層の一部分に隣接して上部スペーサ上にシリコン・エピタキシャル層を成長させることと、円筒状Si層の内側部分をエッチングして中空円筒を形成することと、中空円筒の底部に内側スペーサを形成することと、中空円筒の一部分を充填することにより、内側ゲートを形成することと、内側ゲートに隣接して側壁スペーサを形成することと、外側ゲート及びドレインにアクセスし、接触するための深いトレンチをエッチングすることにより形成される。
【選択図】 図17
Description
20:絶縁体層(誘電体層)
21:犠牲側壁
22、24、41:外側ゲート酸化物誘電体
25:ゲート誘電体層(酸化物層)
26、27、28:誘電体層
30、32:シリコン(Si)層(半導体層)
31:埋め込み半導体層(ドレイン)
35:ソース
40:被覆層
41:底部スペーサ
50:外側ゲート
51:上部スペーサ
60:犠牲材料層
61:内側ゲート
70:スペース
Claims (26)
- Si層によって互いに分離されたチューブ状内側及び外側ゲートと、
前記チューブ状内側及び外側ゲートを囲む、それぞれスペーサによって分離されたソース及びドレインと、
を含むナノチューブMOSFETデバイス。 - 前記内側及び外側ゲート、並びに前記ソース及びドレインに一体化したシリコン基板をさらに含む、請求項1に記載のナノチューブMOSFETデバイス。
- 前記基板はSOI基板である、請求項2に記載のナノチューブMOSFETデバイス。
- 前記基板はバルク・シリコンで作製される、請求項2に記載のナノチューブMOSFETデバイス。
- 前記Si層はチューブ状を有する、請求項1に記載のナノチューブMOSFETデバイス。
- 前記SOI基板は、100nmから500nmまでの範囲の厚さを有する層を含む、請求項3に記載のナノチューブMOSFETデバイス。
- 前記外側ゲートは中空円筒状又はチューブ状を有し、前記チューブの外側は酸化物層で囲まれる、請求項1に記載のナノチューブMOSFETデバイス。
- 前記外側ゲート誘電体は、酸化物、酸窒化物、又は酸化ハフニウムから作製される、請求項7に記載のナノチューブMOSFETデバイス。
- 誘電体及びゲート材料で作製されたスタックを形成する内側ゲートをさらに含む、請求項1に記載のナノチューブMOSFETデバイス。
- 前記ソースは自己整合エピタキシャル成長シリコンで作製される、請求項1に記載のナノチューブMOSFETデバイス。
- 前記Si層は、前記内側ゲート及び外側ゲートを分離し、チューブ状を有する、請求項1に記載のナノチューブMOSFETデバイス。
- ナノチューブMOSFETデバイスを形成する方法であって、
基板上に円筒状Si層を形成することと、
前記円筒状Si層を囲む、底部スペーサと上部スペーサとの間に配置された外側ゲートを形成することと、
前記円筒状Si層の一部分に隣接して前記上部スペーサ上にシリコン・エピタキシャル層を成長させることと、
前記円筒状Si層の内側部分をエッチングして中空円筒を形成することと、
前記中空円筒の底部に内側スペーサを形成することと、
前記中空円筒の一部分を充填することにより、内側ゲートを形成することと、
前記内側ゲートに隣接して側壁スペーサを形成することと、
前記外側ゲート及びドレインにアクセスし、接触するための深いトレンチをエッチングすることと、
を含む方法。 - 前記内側及び外側ゲートを同心チューブ状構成で形成することをさらに含む、請求項11に記載の方法。
- 前記円筒状Si層を形成することは、高濃度ドープ材料から作製されたその一部分を含む、請求項11に記載の方法。
- エピタキシャル成長拡張領域上にソースを形成することをさらに含む、請求項13に記載の方法。
- ハードマスクを用いて前記円筒状Si層を定めることをさらに含む、請求項11に記載の方法。
- 一連の反応性イオン・エッチング(RIE)及び選択的エッチングを用いて、外側ゲート・スタックを形成することをさらに含む、請求項11に記載の方法。
- 前記外側ゲート・スタックを形成することは、ゲート誘電体及びゲート材料を用いる、請求項16に記載の方法。
- ゲート誘電体材料を用いて前記外側ゲート・スタックを形成することは、SiO2又はHfO2、又は高K材料を使用することを含み、前記ゲート材料はポリシリコン又は金属で作製される、請求項17に記載の方法。
- ゲート誘電体材料を堆積させることよって前記中空円筒を形成することをさらに含む、請求項17に記載の方法。
- 前記内側ゲートに隣接して前記側壁スペーサを形成することに続いて、前記内側ゲートをシリサイド化することを含む、請求項11に記載の方法。
- 前記ソース及び前記シリコン・エピタキシャル層をシリサイド化することをさらに含む、請求項20に記載の方法。
- 前記内側ゲート、前記ソース、及び前記外側スペーサの間に配置されたスペースを誘電体材料で充填することをさらに含む、請求項11に記載の方法。
- 前記外側ゲートにアクセスする深いトレンチを介してコンタクトを形成することをさらに含む、請求項11に記載の方法。
- 前記Si基板にアクセスすることをさらに含み、前記ドレインにアクセスすることをさらに含む、請求項11に記載の方法。
- 前記チューブ状シリコン層で囲まれた前記内側ゲート酸化物によって囲まれる前記内側ゲートを形成することをさらに含む、請求項11に記載の方法。
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Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/036,292 US8871576B2 (en) | 2011-02-28 | 2011-02-28 | Silicon nanotube MOSFET |
US13/036,292 | 2011-02-28 | ||
PCT/US2012/020728 WO2012118568A2 (en) | 2011-02-28 | 2012-01-10 | Silicon nanotube mosfet |
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JP2014510402A true JP2014510402A (ja) | 2014-04-24 |
JP6075565B2 JP6075565B2 (ja) | 2017-02-08 |
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JP2013556621A Active JP6075565B2 (ja) | 2011-02-28 | 2012-01-10 | シリコン・ナノチューブmosfet |
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US (2) | US8871576B2 (ja) |
JP (1) | JP6075565B2 (ja) |
CN (1) | CN103392234B (ja) |
DE (1) | DE112012000310B4 (ja) |
GB (1) | GB2500556B (ja) |
WO (1) | WO2012118568A2 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2023084851A1 (ja) * | 2021-11-12 | 2023-05-19 | ソニーグループ株式会社 | 半導体装置 |
WO2023209493A1 (ja) * | 2022-04-29 | 2023-11-02 | 株式会社半導体エネルギー研究所 | 半導体装置及び半導体装置の作製方法 |
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US5861147A (en) | 1997-06-09 | 1999-01-19 | The Procter & Gamble Company | Methods for controlling environmental odors on the body using compositions comprising uncomplexed cyclodextrins and perfume |
US9224813B2 (en) * | 2011-03-02 | 2015-12-29 | King Abdullah University Of Science And Technology | Cylindrical-shaped nanotube field effect transistor |
FR2980918B1 (fr) * | 2011-10-04 | 2014-03-07 | Univ Granada | Point memoire ram a un transistor |
US9941394B2 (en) * | 2014-04-30 | 2018-04-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Tunnel field-effect transistor |
US10818558B2 (en) | 2015-04-24 | 2020-10-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure having trench and manufacturing method thereof |
US9570299B1 (en) | 2015-09-08 | 2017-02-14 | International Business Machines Corporation | Formation of SiGe nanotubes |
US9917196B1 (en) * | 2016-10-14 | 2018-03-13 | International Business Machines Corporation | Semiconductor device and method of forming the semiconductor device |
WO2019123216A1 (en) * | 2017-12-21 | 2019-06-27 | King Abdullah University Of Science And Technology | Silicon nanotube, field effect transistor-based memory cell, memory array and method of production |
US10559675B2 (en) | 2017-12-21 | 2020-02-11 | International Business Machines Corporation | Stacked silicon nanotubes |
US10622208B2 (en) * | 2017-12-22 | 2020-04-14 | International Business Machines Corporation | Lateral semiconductor nanotube with hexagonal shape |
US20210083050A1 (en) * | 2017-12-26 | 2021-03-18 | King Abdullah University Of Science And Technology | Silicon nanotube, negative-capacitance transistor with ferroelectric layer and method of making |
US10693056B2 (en) | 2017-12-28 | 2020-06-23 | Spin Memory, Inc. | Three-dimensional (3D) magnetic memory device comprising a magnetic tunnel junction (MTJ) having a metallic buffer layer |
US10541268B2 (en) | 2017-12-28 | 2020-01-21 | Spin Memory, Inc. | Three-dimensional magnetic memory devices |
US10403343B2 (en) | 2017-12-29 | 2019-09-03 | Spin Memory, Inc. | Systems and methods utilizing serial configurations of magnetic memory devices |
US10803916B2 (en) | 2017-12-29 | 2020-10-13 | Spin Memory, Inc. | Methods and systems for writing to magnetic memory devices utilizing alternating current |
US10438999B2 (en) * | 2017-12-29 | 2019-10-08 | Spin Memory, Inc. | Annular vertical Si etched channel MOS devices |
US10424357B2 (en) | 2017-12-29 | 2019-09-24 | Spin Memory, Inc. | Magnetic tunnel junction (MTJ) memory device having a composite free magnetic layer |
US10347308B1 (en) | 2017-12-29 | 2019-07-09 | Spin Memory, Inc. | Systems and methods utilizing parallel configurations of magnetic memory devices |
US10192788B1 (en) * | 2018-01-08 | 2019-01-29 | Spin Transfer Technologies | Methods of fabricating dual threshold voltage devices with stacked gates |
US10319424B1 (en) | 2018-01-08 | 2019-06-11 | Spin Memory, Inc. | Adjustable current selectors |
US10192789B1 (en) * | 2018-01-08 | 2019-01-29 | Spin Transfer Technologies | Methods of fabricating dual threshold voltage devices |
US10770510B2 (en) * | 2018-01-08 | 2020-09-08 | Spin Memory, Inc. | Dual threshold voltage devices having a first transistor and a second transistor |
US10192787B1 (en) * | 2018-01-08 | 2019-01-29 | Spin Transfer Technologies | Methods of fabricating contacts for cylindrical devices |
US10497415B2 (en) | 2018-01-08 | 2019-12-03 | Spin Memory, Inc. | Dual gate memory devices |
US10971584B2 (en) | 2018-03-07 | 2021-04-06 | International Business Machines Corporation | Low contact resistance nanowire FETs |
CN108470771A (zh) * | 2018-04-11 | 2018-08-31 | 北京邮电大学 | 一种纳米线晶体管 |
US10680063B2 (en) | 2018-09-07 | 2020-06-09 | International Business Machines Corporation | Method of manufacturing stacked SiGe nanotubes |
US10770546B2 (en) * | 2018-09-26 | 2020-09-08 | International Business Machines Corporation | High density nanotubes and nanotube devices |
US10878870B2 (en) | 2018-09-28 | 2020-12-29 | Spin Memory, Inc. | Defect propagation structure and mechanism for magnetic memory |
US10692556B2 (en) | 2018-09-28 | 2020-06-23 | Spin Memory, Inc. | Defect injection structure and mechanism for magnetic memory |
CN109713042A (zh) * | 2018-12-28 | 2019-05-03 | 上海集成电路研发中心有限公司 | 场效应管和半导体器件 |
CN110729360B (zh) * | 2019-10-25 | 2022-12-09 | 中国科学院微电子研究所 | 一种纳米管器件及其制造方法 |
US11557519B2 (en) * | 2020-08-21 | 2023-01-17 | Tokyo Electron Limited | Optimum high density 3D device layout and method of fabrication |
US20220254690A1 (en) * | 2021-02-09 | 2022-08-11 | Tokyo Electron Limited | 3d devices with 3d diffusion breaks and method of forming the same |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07211792A (ja) * | 1994-01-18 | 1995-08-11 | Toshiba Corp | 半導体装置 |
JP2002543624A (ja) * | 1999-04-30 | 2002-12-17 | インフィニオン テクノロジーズ ノース アメリカ コーポレイション | 縦型トランジスタを有するトレンチキャパシタdramセル |
US20060017104A1 (en) * | 2004-07-22 | 2006-01-26 | Jae-Man Yoon | Semiconductor device having a channel pattern and method of manufacturing the same |
JP2009038201A (ja) * | 2007-08-01 | 2009-02-19 | Elpida Memory Inc | 半導体装置および半導体装置の製造方法 |
JP2009283772A (ja) * | 2008-05-23 | 2009-12-03 | Nec Corp | 半導体装置及び半導体装置の製造方法 |
US20110012085A1 (en) * | 2007-09-24 | 2011-01-20 | International Business Machines Corporation | Methods of manufacture of vertical nanowire fet devices |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100206877B1 (ko) * | 1995-12-28 | 1999-07-01 | 구본준 | 박막트랜지스터 제조방법 |
DE10250834A1 (de) | 2002-10-31 | 2004-05-19 | Infineon Technologies Ag | Speicherzelle, Speicherzellen-Anordnung, Strukturier-Anordnung und Verfahren zum Herstellen einer Speicherzelle |
DE10250868B8 (de) | 2002-10-31 | 2008-06-26 | Qimonda Ag | Vertikal integrierter Feldeffekttransistor, Feldeffekttransistor-Anordnung und Verfahren zum Herstellen eines vertikal integrierten Feldeffekttransistors |
KR100574317B1 (ko) * | 2004-02-19 | 2006-04-26 | 삼성전자주식회사 | 게이트 구조물, 이를 갖는 반도체 장치 및 그 형성 방법 |
KR100666187B1 (ko) * | 2004-08-04 | 2007-01-09 | 학교법인 한양학원 | 나노선을 이용한 수직형 반도체 소자 및 이의 제조 방법 |
WO2007022359A2 (en) * | 2005-08-16 | 2007-02-22 | The Regents Of The University Of California | Vertical integrated silicon nanowire field effect transistors and methods of fabrication |
KR20080035211A (ko) * | 2006-10-18 | 2008-04-23 | 삼성전자주식회사 | 리세스-타입 제어 게이트 전극을 구비하는 반도체 메모리소자 |
US7935598B2 (en) * | 2007-12-24 | 2011-05-03 | Hynix Semiconductor Inc. | Vertical channel transistor and method of fabricating the same |
US7868374B2 (en) | 2008-02-21 | 2011-01-11 | International Business Machines Corporation | Semitubular metal-oxide-semiconductor field effect transistor |
CN101944539B (zh) * | 2009-07-09 | 2012-05-02 | 北京大学 | 一种独立栅控制的纳米线场效应晶体管 |
US8349681B2 (en) * | 2010-06-30 | 2013-01-08 | Sandisk Technologies Inc. | Ultrahigh density monolithic, three dimensional vertical NAND memory device |
-
2011
- 2011-02-28 US US13/036,292 patent/US8871576B2/en active Active
-
2012
- 2012-01-10 GB GB1313198.2A patent/GB2500556B/en active Active
- 2012-01-10 CN CN201280010634.4A patent/CN103392234B/zh active Active
- 2012-01-10 JP JP2013556621A patent/JP6075565B2/ja active Active
- 2012-01-10 WO PCT/US2012/020728 patent/WO2012118568A2/en active Application Filing
- 2012-01-10 DE DE112012000310.1T patent/DE112012000310B4/de active Active
-
2013
- 2013-11-06 US US14/073,017 patent/US8866266B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07211792A (ja) * | 1994-01-18 | 1995-08-11 | Toshiba Corp | 半導体装置 |
JP2002543624A (ja) * | 1999-04-30 | 2002-12-17 | インフィニオン テクノロジーズ ノース アメリカ コーポレイション | 縦型トランジスタを有するトレンチキャパシタdramセル |
US20060017104A1 (en) * | 2004-07-22 | 2006-01-26 | Jae-Man Yoon | Semiconductor device having a channel pattern and method of manufacturing the same |
JP2009038201A (ja) * | 2007-08-01 | 2009-02-19 | Elpida Memory Inc | 半導体装置および半導体装置の製造方法 |
US20110012085A1 (en) * | 2007-09-24 | 2011-01-20 | International Business Machines Corporation | Methods of manufacture of vertical nanowire fet devices |
JP2009283772A (ja) * | 2008-05-23 | 2009-12-03 | Nec Corp | 半導体装置及び半導体装置の製造方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2023084851A1 (ja) * | 2021-11-12 | 2023-05-19 | ソニーグループ株式会社 | 半導体装置 |
WO2023209493A1 (ja) * | 2022-04-29 | 2023-11-02 | 株式会社半導体エネルギー研究所 | 半導体装置及び半導体装置の作製方法 |
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WO2012118568A3 (en) | 2012-11-08 |
US8866266B2 (en) | 2014-10-21 |
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GB2500556B (en) | 2014-02-05 |
CN103392234A (zh) | 2013-11-13 |
DE112012000310B4 (de) | 2019-03-21 |
CN103392234B (zh) | 2017-06-16 |
US8871576B2 (en) | 2014-10-28 |
US20120217468A1 (en) | 2012-08-30 |
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US20140061583A1 (en) | 2014-03-06 |
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