JP2014143419A5 - - Google Patents

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JP2014143419A5
JP2014143419A5 JP2014009652A JP2014009652A JP2014143419A5 JP 2014143419 A5 JP2014143419 A5 JP 2014143419A5 JP 2014009652 A JP2014009652 A JP 2014009652A JP 2014009652 A JP2014009652 A JP 2014009652A JP 2014143419 A5 JP2014143419 A5 JP 2014143419A5
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semiconductor
drift
drain
semiconductor region
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JP2014009652A
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Japanese (ja)
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JP2014143419A (ja
JP6261122B2 (ja
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Priority claimed from US13/748,076 external-priority patent/US9490322B2/en
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JP2014009652A 2013-01-23 2014-01-22 ３次元的な表面電界緩和が増強された半導体デバイス Active JP6261122B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/748,076 US9490322B2 (en) 2013-01-23 2013-01-23 Semiconductor device with enhanced 3D resurf
US13/748,076 2013-01-23

Publications (3)

Publication Number Publication Date
JP2014143419A JP2014143419A (ja) 2014-08-07
JP2014143419A5 true JP2014143419A5 (enExample) 2017-02-23
JP6261122B2 JP6261122B2 (ja) 2018-01-17

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JP2014009652A Active JP6261122B2 (ja) 2013-01-23 2014-01-22 ３次元的な表面電界緩和が増強された半導体デバイス

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US (2) US9490322B2 (enExample)
JP (1) JP6261122B2 (enExample)
CN (1) CN103943668B (enExample)

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