JP2014138141A5 - - Google Patents
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- Publication number
- JP2014138141A5 JP2014138141A5 JP2013007115A JP2013007115A JP2014138141A5 JP 2014138141 A5 JP2014138141 A5 JP 2014138141A5 JP 2013007115 A JP2013007115 A JP 2013007115A JP 2013007115 A JP2013007115 A JP 2013007115A JP 2014138141 A5 JP2014138141 A5 JP 2014138141A5
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- bit line
- semiconductor device
- conductive layer
- interlayer insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011229 interlayer Substances 0.000 claims description 17
- 239000010410 layer Substances 0.000 claims description 16
- 239000004065 semiconductor Substances 0.000 claims 18
- 238000004519 manufacturing process Methods 0.000 claims 7
- 239000000463 material Substances 0.000 claims 5
- 238000005530 etching Methods 0.000 claims 2
- 238000000034 method Methods 0.000 claims 2
- 239000000758 substrate Substances 0.000 claims 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013007115A JP6040035B2 (ja) | 2013-01-18 | 2013-01-18 | 半導体装置およびその製造方法 |
| US14/156,026 US9472495B2 (en) | 2013-01-18 | 2014-01-15 | Semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013007115A JP6040035B2 (ja) | 2013-01-18 | 2013-01-18 | 半導体装置およびその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014138141A JP2014138141A (ja) | 2014-07-28 |
| JP2014138141A5 true JP2014138141A5 (enExample) | 2015-10-15 |
| JP6040035B2 JP6040035B2 (ja) | 2016-12-07 |
Family
ID=51207098
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013007115A Active JP6040035B2 (ja) | 2013-01-18 | 2013-01-18 | 半導体装置およびその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US9472495B2 (enExample) |
| JP (1) | JP6040035B2 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6448424B2 (ja) * | 2015-03-17 | 2019-01-09 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| US10896873B2 (en) * | 2018-11-16 | 2021-01-19 | Google Llc | Massive deep trench capacitor die fill for high performance application specific integrated circuit (ASIC) applications |
| KR102890492B1 (ko) * | 2020-12-17 | 2025-11-26 | 삼성전자주식회사 | 반도체 소자 및 그의 제조 방법 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100258576B1 (ko) * | 1997-11-04 | 2000-06-15 | 윤종용 | 반도체 장치의 마이크로 콘택 형성 방법 |
| JP2001102550A (ja) * | 1999-09-02 | 2001-04-13 | Samsung Electronics Co Ltd | 自己整合コンタクトを有する半導体メモリ装置及びその製造方法 |
| KR100331568B1 (ko) * | 2000-05-26 | 2002-04-06 | 윤종용 | 반도체 메모리 소자 및 그 제조방법 |
| US6563162B2 (en) * | 2001-03-21 | 2003-05-13 | Samsung Electronics Co., Ltd. | Semiconductor memory device for reducing parasitic bit line capacitance and method of fabricating the same |
| KR100408411B1 (ko) * | 2001-06-01 | 2003-12-06 | 삼성전자주식회사 | 반도체 메모리 소자 및 그 제조방법 |
| JP2011077539A (ja) | 2003-06-30 | 2011-04-14 | Renesas Electronics Corp | 半導体装置とその製造方法 |
| JP4658486B2 (ja) | 2003-06-30 | 2011-03-23 | ルネサスエレクトロニクス株式会社 | 半導体装置とその製造方法 |
| US7247537B2 (en) * | 2003-08-18 | 2007-07-24 | Samsung Electronics Co., Ltd. | Semiconductor device including an improved capacitor and method for manufacturing the same |
| JP2009016596A (ja) * | 2007-07-05 | 2009-01-22 | Elpida Memory Inc | 半導体装置及び半導体装置の製造方法 |
| KR101283574B1 (ko) * | 2007-08-09 | 2013-07-08 | 삼성전자주식회사 | 질소를 함유하는 절연막 형성 방법 및 그것을 포함하는플래시 메모리 소자의 제조 방법 |
| JP2010040538A (ja) | 2008-07-31 | 2010-02-18 | Toshiba Corp | 半導体装置の製造方法 |
| JP2012054342A (ja) | 2010-08-31 | 2012-03-15 | Toshiba Corp | 半導体装置およびその製造方法 |
-
2013
- 2013-01-18 JP JP2013007115A patent/JP6040035B2/ja active Active
-
2014
- 2014-01-15 US US14/156,026 patent/US9472495B2/en active Active
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