JP2011522347A5 - - Google Patents

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Publication number
JP2011522347A5
JP2011522347A5 JP2011511663A JP2011511663A JP2011522347A5 JP 2011522347 A5 JP2011522347 A5 JP 2011522347A5 JP 2011511663 A JP2011511663 A JP 2011511663A JP 2011511663 A JP2011511663 A JP 2011511663A JP 2011522347 A5 JP2011522347 A5 JP 2011522347A5
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JP
Japan
Prior art keywords
reference cell
voltage
cell
memory cells
control gate
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Application number
JP2011511663A
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English (en)
Japanese (ja)
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JP2011522347A (ja
JP5406920B2 (ja
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Priority claimed from US12/130,186 external-priority patent/US7782664B2/en
Application filed filed Critical
Publication of JP2011522347A publication Critical patent/JP2011522347A/ja
Publication of JP2011522347A5 publication Critical patent/JP2011522347A5/ja
Application granted granted Critical
Publication of JP5406920B2 publication Critical patent/JP5406920B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2011511663A 2008-05-30 2009-03-27 不揮発性メモリ基準セルの電気的なトリミングの方法 Expired - Fee Related JP5406920B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/130,186 2008-05-30
US12/130,186 US7782664B2 (en) 2008-05-30 2008-05-30 Method for electrically trimming an NVM reference cell
PCT/US2009/038539 WO2009148688A1 (en) 2008-05-30 2009-03-27 Method for electrically trimming an nvm reference cell

Publications (3)

Publication Number Publication Date
JP2011522347A JP2011522347A (ja) 2011-07-28
JP2011522347A5 true JP2011522347A5 (cg-RX-API-DMAC7.html) 2012-05-17
JP5406920B2 JP5406920B2 (ja) 2014-02-05

Family

ID=41379603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011511663A Expired - Fee Related JP5406920B2 (ja) 2008-05-30 2009-03-27 不揮発性メモリ基準セルの電気的なトリミングの方法

Country Status (4)

Country Link
US (1) US7782664B2 (cg-RX-API-DMAC7.html)
JP (1) JP5406920B2 (cg-RX-API-DMAC7.html)
TW (1) TW200949838A (cg-RX-API-DMAC7.html)
WO (1) WO2009148688A1 (cg-RX-API-DMAC7.html)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011187104A (ja) * 2010-03-05 2011-09-22 Renesas Electronics Corp 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の制御方法
US8248855B2 (en) * 2010-03-10 2012-08-21 Infinite Memories Ltd. Method of handling reference cells in NVM arrays
US8427877B2 (en) * 2011-02-11 2013-04-23 Freescale Semiconductor, Inc. Digital method to obtain the I-V curves of NVM bitcells
US8363477B2 (en) * 2011-03-09 2013-01-29 Ememory Technology Inc. Method of setting trim codes for a flash memory and related device
US8687428B2 (en) 2011-10-31 2014-04-01 Freescale Semiconductor, Inc. Built-in self trim for non-volatile memory reference current
TWI466122B (zh) * 2012-05-18 2014-12-21 Elite Semiconductor Esmt 具有參考晶胞調整電路的半導體記憶體元件以及包含此元件的並列調整裝置
CN109785896B (zh) * 2018-12-17 2020-12-15 珠海博雅科技有限公司 一种上电同时读取修调位的电路、方法及装置
US11114176B1 (en) * 2020-03-06 2021-09-07 Qualcomm Incorporated Systems and methods to provide write termination for one time programmable memory cells
CN114664355B (zh) * 2022-03-16 2022-11-25 珠海博雅科技股份有限公司 非易失性存储器的参考电流产生模块和参考电流设置方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3454520B2 (ja) * 1990-11-30 2003-10-06 インテル・コーポレーション フラッシュ記憶装置の書込み状態を確認する回路及びその方法
US6078518A (en) 1998-02-25 2000-06-20 Micron Technology, Inc. Apparatus and method for reading state of multistate non-volatile memory cells
US6490203B1 (en) 2001-05-24 2002-12-03 Edn Silicon Devices, Inc. Sensing scheme of flash EEPROM
JP4118623B2 (ja) * 2002-07-23 2008-07-16 松下電器産業株式会社 不揮発性半導体記憶装置
US6839280B1 (en) 2003-06-27 2005-01-04 Freescale Semiconductor, Inc. Variable gate bias for a reference transistor in a non-volatile memory
JP2005222625A (ja) * 2004-02-06 2005-08-18 Sharp Corp 不揮発性半導体記憶装置
JP4554613B2 (ja) * 2004-07-30 2010-09-29 Ｓｐａｎｓｉｏｎ Ｊａｐａｎ株式会社 半導体装置および半導体装置にデータを書き込む方法
JP2006228277A (ja) * 2005-02-15 2006-08-31 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP4942990B2 (ja) * 2005-12-12 2012-05-30 パナソニック株式会社 半導体記憶装置
JP5067836B2 (ja) * 2005-12-19 2012-11-07 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置及びその動作方法

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