JP2010539723A - エピタキシャル固体半導体ヘテロ構造及びその製造方法 - Google Patents
エピタキシャル固体半導体ヘテロ構造及びその製造方法 Download PDFInfo
- Publication number
- JP2010539723A JP2010539723A JP2010525404A JP2010525404A JP2010539723A JP 2010539723 A JP2010539723 A JP 2010539723A JP 2010525404 A JP2010525404 A JP 2010525404A JP 2010525404 A JP2010525404 A JP 2010525404A JP 2010539723 A JP2010539723 A JP 2010539723A
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- semiconductor
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- single crystal
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- H10P14/2905—
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02502—Layer structure consisting of two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02543—Phosphides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02546—Arsenides
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- H10P14/3238—
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- H10P14/3248—
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- H10P14/3411—
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- H10P14/3418—
-
- H10P14/3421—
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02433—Crystal orientation
-
- H10P14/2926—
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Physical Vapour Deposition (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0757652A FR2921200B1 (fr) | 2007-09-18 | 2007-09-18 | Heterostructures semi-conductrices monolithiques epitaxiees et leur procede de fabrication |
| PCT/FR2008/051669 WO2009047448A1 (fr) | 2007-09-18 | 2008-09-17 | Hétérostructures semi-conductrices monolithiques épitaxiées et leur procédé de fabrication |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014138772A Division JP6062887B2 (ja) | 2007-09-18 | 2014-07-04 | エピタキシャル固体半導体ヘテロ構造及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2010539723A true JP2010539723A (ja) | 2010-12-16 |
| JP2010539723A5 JP2010539723A5 (enExample) | 2011-10-27 |
Family
ID=39434296
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010525404A Pending JP2010539723A (ja) | 2007-09-18 | 2008-09-17 | エピタキシャル固体半導体ヘテロ構造及びその製造方法 |
| JP2014138772A Expired - Fee Related JP6062887B2 (ja) | 2007-09-18 | 2014-07-04 | エピタキシャル固体半導体ヘテロ構造及びその製造方法 |
| JP2016205042A Pending JP2017028318A (ja) | 2007-09-18 | 2016-10-19 | エピタキシャル固体半導体ヘテロ構造及びその製造方法 |
Family Applications After (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014138772A Expired - Fee Related JP6062887B2 (ja) | 2007-09-18 | 2014-07-04 | エピタキシャル固体半導体ヘテロ構造及びその製造方法 |
| JP2016205042A Pending JP2017028318A (ja) | 2007-09-18 | 2016-10-19 | エピタキシャル固体半導体ヘテロ構造及びその製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8389995B2 (enExample) |
| EP (1) | EP2188830A1 (enExample) |
| JP (3) | JP2010539723A (enExample) |
| FR (1) | FR2921200B1 (enExample) |
| WO (1) | WO2009047448A1 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5585137B2 (ja) * | 2010-03-17 | 2014-09-10 | 行男 渡部 | 金属酸化物を含むへテロ構造の作製法及び該金属酸化物の製造法 |
| US8846506B2 (en) * | 2012-04-26 | 2014-09-30 | The University Of North Carolina At Charlotte | Enhanced electron mobility at the interface between Gd2O3(100)/N-Si(100) |
| GB2517697A (en) | 2013-08-27 | 2015-03-04 | Ibm | Compound semiconductor structure |
| FR3069705A1 (fr) | 2017-07-28 | 2019-02-01 | Centre National De La Recherche Scientifique | Cellule photovoltaique tandem |
| CN113284839B (zh) * | 2021-05-21 | 2024-07-02 | 中国科学院上海微系统与信息技术研究所 | 一种钻石晶体的异质键合方法及异质结构 |
| CN116102085B (zh) * | 2023-02-24 | 2024-08-20 | 黑龙江大学 | 一种原位制备铁系尖晶石异质结阵列材料的方法 |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06216051A (ja) * | 1992-12-02 | 1994-08-05 | Xerox Corp | エピタキシャル(111) 緩衝層を有する構造 |
| US20030024471A1 (en) * | 2001-08-06 | 2003-02-06 | Motorola, Inc. | Fabrication of semiconductor structures and devices forms by utilizing laser assisted deposition |
| JP2003282439A (ja) * | 2002-03-27 | 2003-10-03 | Seiko Epson Corp | デバイス用基板およびデバイス用基板の製造方法 |
| JP2003306399A (ja) * | 2002-03-06 | 2003-10-28 | Agilent Technol Inc | シリコン基板上にリン化インジウム層を形成する方法 |
| WO2004051725A1 (ja) * | 2002-12-03 | 2004-06-17 | Nikko Materials Co., Ltd. | エピタキシャル成長方法およびエピタキシャル成長用基板 |
| JP2005524977A (ja) * | 2002-05-03 | 2005-08-18 | フリースケール セミコンダクター インコーポレイテッド | 半導体素子をその上に搭載する単結晶酸化物 |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2649928B2 (ja) * | 1988-01-11 | 1997-09-03 | 富士通株式会社 | 半導体ウエハの製造方法 |
| US6608327B1 (en) * | 1998-02-27 | 2003-08-19 | North Carolina State University | Gallium nitride semiconductor structure including laterally offset patterned layers |
| US6410941B1 (en) * | 2000-06-30 | 2002-06-25 | Motorola, Inc. | Reconfigurable systems using hybrid integrated circuits with optical ports |
| US6427066B1 (en) * | 2000-06-30 | 2002-07-30 | Motorola, Inc. | Apparatus and method for effecting communications among a plurality of remote stations |
| KR20030051868A (ko) * | 2000-11-22 | 2003-06-25 | 모토로라 인코포레이티드 | 컴플라이언트 기판을 갖는 반도체 구조 |
| US20020096683A1 (en) * | 2001-01-19 | 2002-07-25 | Motorola, Inc. | Structure and method for fabricating GaN devices utilizing the formation of a compliant substrate |
| US20020153524A1 (en) * | 2001-04-19 | 2002-10-24 | Motorola Inc. | Structure and method for fabricating semiconductor structures and devices utilizing perovskite stacks |
| US20020158265A1 (en) * | 2001-04-26 | 2002-10-31 | Motorola, Inc. | Structure and method for fabricating high contrast reflective mirrors |
| US20020163024A1 (en) * | 2001-05-04 | 2002-11-07 | Motorola, Inc. | Structure and method for fabricating semiconductor structures and devices ultilizing lateral epitaxial overgrowth of a monocrystallaline material layer on a compliant substrate |
| AU2002328130B2 (en) * | 2001-06-06 | 2008-05-29 | Ammono Sp. Z O.O. | Process and apparatus for obtaining bulk monocrystalline gallium-containing nitride |
| US20030015134A1 (en) * | 2001-07-18 | 2003-01-23 | Motorola, Inc. | Semiconductor structure for edge mounting applications and process for fabrication |
| US6472276B1 (en) * | 2001-07-20 | 2002-10-29 | Motorola, Inc. | Using silicate layers for composite semiconductor |
| US6472694B1 (en) * | 2001-07-23 | 2002-10-29 | Motorola, Inc. | Microprocessor structure having a compound semiconductor layer |
| CA2455230A1 (en) * | 2001-07-31 | 2003-02-13 | The Board Of Trustees Of The University Of Illinois | Coupled quantum dot and quantum well semiconductor device and method of making the same |
| US6462360B1 (en) * | 2001-08-06 | 2002-10-08 | Motorola, Inc. | Integrated gallium arsenide communications systems |
| JP4041877B2 (ja) * | 2001-12-27 | 2008-02-06 | 国立大学法人 筑波大学 | 半導体装置 |
| JP2003332242A (ja) * | 2002-05-10 | 2003-11-21 | Makoto Ishida | 半導体基板およびその製造方法 |
| JP2003327497A (ja) * | 2002-05-13 | 2003-11-19 | Sumitomo Electric Ind Ltd | GaN単結晶基板、窒化物系半導体エピタキシャル基板、窒化物系半導体素子及びその製造方法 |
| JP2004317886A (ja) * | 2003-04-17 | 2004-11-11 | Matsushita Electric Ind Co Ltd | 光スイッチとそれを用いた光磁気回路、ならびに光磁気回路の製造方法 |
| US7968273B2 (en) * | 2004-06-08 | 2011-06-28 | Nanosys, Inc. | Methods and devices for forming nanostructure monolayers and devices including such monolayers |
| JP4707475B2 (ja) * | 2005-06-17 | 2011-06-22 | 国立大学法人 東京大学 | 化合物半導体結晶の成長方法、その成長方法を用いて成長した化合物半導体結晶の層を備えた半導体装置及び半導体基板 |
| KR100753152B1 (ko) * | 2005-08-12 | 2007-08-30 | 삼성전자주식회사 | 질화물계 발광소자 및 그 제조방법 |
| JP4809684B2 (ja) * | 2006-01-31 | 2011-11-09 | 富士通株式会社 | 半導体装置 |
-
2007
- 2007-09-18 FR FR0757652A patent/FR2921200B1/fr not_active Expired - Fee Related
-
2008
- 2008-09-17 US US12/678,548 patent/US8389995B2/en not_active Expired - Fee Related
- 2008-09-17 EP EP08837575A patent/EP2188830A1/fr not_active Withdrawn
- 2008-09-17 JP JP2010525404A patent/JP2010539723A/ja active Pending
- 2008-09-17 WO PCT/FR2008/051669 patent/WO2009047448A1/fr not_active Ceased
-
2014
- 2014-07-04 JP JP2014138772A patent/JP6062887B2/ja not_active Expired - Fee Related
-
2016
- 2016-10-19 JP JP2016205042A patent/JP2017028318A/ja active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06216051A (ja) * | 1992-12-02 | 1994-08-05 | Xerox Corp | エピタキシャル(111) 緩衝層を有する構造 |
| US20030024471A1 (en) * | 2001-08-06 | 2003-02-06 | Motorola, Inc. | Fabrication of semiconductor structures and devices forms by utilizing laser assisted deposition |
| JP2003306399A (ja) * | 2002-03-06 | 2003-10-28 | Agilent Technol Inc | シリコン基板上にリン化インジウム層を形成する方法 |
| JP2003282439A (ja) * | 2002-03-27 | 2003-10-03 | Seiko Epson Corp | デバイス用基板およびデバイス用基板の製造方法 |
| JP2005524977A (ja) * | 2002-05-03 | 2005-08-18 | フリースケール セミコンダクター インコーポレイテッド | 半導体素子をその上に搭載する単結晶酸化物 |
| WO2004051725A1 (ja) * | 2002-12-03 | 2004-06-17 | Nikko Materials Co., Ltd. | エピタキシャル成長方法およびエピタキシャル成長用基板 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2017028318A (ja) | 2017-02-02 |
| FR2921200A1 (fr) | 2009-03-20 |
| JP6062887B2 (ja) | 2017-01-18 |
| US8389995B2 (en) | 2013-03-05 |
| WO2009047448A1 (fr) | 2009-04-16 |
| EP2188830A1 (fr) | 2010-05-26 |
| FR2921200B1 (fr) | 2009-12-18 |
| JP2015008293A (ja) | 2015-01-15 |
| US20100289063A1 (en) | 2010-11-18 |
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