JP2010532567A5 - - Google Patents
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- Publication number
- JP2010532567A5 JP2010532567A5 JP2010514821A JP2010514821A JP2010532567A5 JP 2010532567 A5 JP2010532567 A5 JP 2010532567A5 JP 2010514821 A JP2010514821 A JP 2010514821A JP 2010514821 A JP2010514821 A JP 2010514821A JP 2010532567 A5 JP2010532567 A5 JP 2010532567A5
- Authority
- JP
- Japan
- Prior art keywords
- layer
- conductive
- interconnect element
- forming
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010410 layer Substances 0.000 claims 78
- 239000002184 metal Substances 0.000 claims 45
- 238000000034 method Methods 0.000 claims 33
- 239000000758 substrate Substances 0.000 claims 19
- 238000004377 microelectronic Methods 0.000 claims 7
- 238000002844 melting Methods 0.000 claims 6
- 230000008018 melting Effects 0.000 claims 6
- 239000007787 solid Substances 0.000 claims 6
- 239000000853 adhesive Substances 0.000 claims 4
- 230000001070 adhesive effect Effects 0.000 claims 4
- 239000012790 adhesive layer Substances 0.000 claims 1
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 238000005530 etching Methods 0.000 claims 1
- 230000007261 regionalization Effects 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/824,484 US7911805B2 (en) | 2007-06-29 | 2007-06-29 | Multilayer wiring element having pin interface |
| US11/824,484 | 2007-06-29 | ||
| PCT/US2008/007978 WO2009005696A1 (en) | 2007-06-29 | 2008-06-23 | Multilayer wiring element having pin interface |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013238596A Division JP6001524B2 (ja) | 2007-06-29 | 2013-11-19 | ピン・インタフェースを有する多層配線エレメント |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010532567A JP2010532567A (ja) | 2010-10-07 |
| JP2010532567A5 true JP2010532567A5 (cg-RX-API-DMAC7.html) | 2011-09-29 |
| JP5421254B2 JP5421254B2 (ja) | 2014-02-19 |
Family
ID=40160169
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010514821A Active JP5421254B2 (ja) | 2007-06-29 | 2008-06-23 | ピン・インタフェースを有する多層配線エレメント |
| JP2013238596A Active JP6001524B2 (ja) | 2007-06-29 | 2013-11-19 | ピン・インタフェースを有する多層配線エレメント |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013238596A Active JP6001524B2 (ja) | 2007-06-29 | 2013-11-19 | ピン・インタフェースを有する多層配線エレメント |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7911805B2 (cg-RX-API-DMAC7.html) |
| EP (1) | EP2172089B1 (cg-RX-API-DMAC7.html) |
| JP (2) | JP5421254B2 (cg-RX-API-DMAC7.html) |
| KR (1) | KR101530896B1 (cg-RX-API-DMAC7.html) |
| CN (1) | CN101772995B (cg-RX-API-DMAC7.html) |
| WO (1) | WO2009005696A1 (cg-RX-API-DMAC7.html) |
Families Citing this family (57)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7495179B2 (en) | 2003-10-06 | 2009-02-24 | Tessera, Inc. | Components with posts and pads |
| US8641913B2 (en) | 2003-10-06 | 2014-02-04 | Tessera, Inc. | Fine pitch microcontacts and method for forming thereof |
| US7709968B2 (en) | 2003-12-30 | 2010-05-04 | Tessera, Inc. | Micro pin grid array with pin motion isolation |
| KR101313391B1 (ko) | 2004-11-03 | 2013-10-01 | 테세라, 인코포레이티드 | 적층형 패키징 |
| US8058101B2 (en) | 2005-12-23 | 2011-11-15 | Tessera, Inc. | Microelectronic packages and methods therefor |
| US7911805B2 (en) * | 2007-06-29 | 2011-03-22 | Tessera, Inc. | Multilayer wiring element having pin interface |
| US8238114B2 (en) * | 2007-09-20 | 2012-08-07 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing same |
| EP2206145A4 (en) | 2007-09-28 | 2012-03-28 | Tessera Inc | FLIP-CHIP CONNECTION WITH DOUBLE POSTS |
| US20100044860A1 (en) * | 2008-08-21 | 2010-02-25 | Tessera Interconnect Materials, Inc. | Microelectronic substrate or element having conductive pads and metal posts joined thereto using bond layer |
| US9006028B2 (en) * | 2008-09-12 | 2015-04-14 | Ananda H. Kumar | Methods for forming ceramic substrates with via studs |
| US8330272B2 (en) | 2010-07-08 | 2012-12-11 | Tessera, Inc. | Microelectronic packages with dual or multiple-etched flip-chip connectors |
| US8482111B2 (en) | 2010-07-19 | 2013-07-09 | Tessera, Inc. | Stackable molded microelectronic packages |
| US9159708B2 (en) | 2010-07-19 | 2015-10-13 | Tessera, Inc. | Stackable molded microelectronic packages with area array unit connectors |
| US8580607B2 (en) | 2010-07-27 | 2013-11-12 | Tessera, Inc. | Microelectronic packages with nanoparticle joining |
| US8853558B2 (en) | 2010-12-10 | 2014-10-07 | Tessera, Inc. | Interconnect structure |
| JP5798435B2 (ja) | 2011-03-07 | 2015-10-21 | 日本特殊陶業株式会社 | 電子部品検査装置用配線基板およびその製造方法 |
| JP5777997B2 (ja) * | 2011-03-07 | 2015-09-16 | 日本特殊陶業株式会社 | 電子部品検査装置用配線基板およびその製造方法 |
| KR101128063B1 (ko) | 2011-05-03 | 2012-04-23 | 테세라, 인코포레이티드 | 캡슐화 층의 표면에 와이어 본드를 구비하는 패키지 적층형 어셈블리 |
| US8836136B2 (en) | 2011-10-17 | 2014-09-16 | Invensas Corporation | Package-on-package assembly with wire bond vias |
| US8946757B2 (en) | 2012-02-17 | 2015-02-03 | Invensas Corporation | Heat spreading substrate with embedded interconnects |
| US8372741B1 (en) | 2012-02-24 | 2013-02-12 | Invensas Corporation | Method for package-on-package assembly with wire bonds to encapsulation surface |
| US8835228B2 (en) | 2012-05-22 | 2014-09-16 | Invensas Corporation | Substrate-less stackable package with wire-bond interconnect |
| US9391008B2 (en) | 2012-07-31 | 2016-07-12 | Invensas Corporation | Reconstituted wafer-level package DRAM |
| US9502390B2 (en) | 2012-08-03 | 2016-11-22 | Invensas Corporation | BVA interposer |
| US8878353B2 (en) | 2012-12-20 | 2014-11-04 | Invensas Corporation | Structure for microelectronic packaging with bond elements to encapsulation surface |
| US9136254B2 (en) | 2013-02-01 | 2015-09-15 | Invensas Corporation | Microelectronic package having wire bond vias and stiffening layer |
| US9167710B2 (en) | 2013-08-07 | 2015-10-20 | Invensas Corporation | Embedded packaging with preformed vias |
| US9685365B2 (en) | 2013-08-08 | 2017-06-20 | Invensas Corporation | Method of forming a wire bond having a free end |
| US20150076714A1 (en) | 2013-09-16 | 2015-03-19 | Invensas Corporation | Microelectronic element with bond elements to encapsulation surface |
| US9379074B2 (en) | 2013-11-22 | 2016-06-28 | Invensas Corporation | Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects |
| US9263394B2 (en) | 2013-11-22 | 2016-02-16 | Invensas Corporation | Multiple bond via arrays of different wire heights on a same substrate |
| US9583456B2 (en) | 2013-11-22 | 2017-02-28 | Invensas Corporation | Multiple bond via arrays of different wire heights on a same substrate |
| JP2014045221A (ja) * | 2013-12-09 | 2014-03-13 | Sumitomo Electric Printed Circuit Inc | フレキシブルプリント配線板シートの製造方法 |
| US9583411B2 (en) | 2014-01-17 | 2017-02-28 | Invensas Corporation | Fine pitch BVA using reconstituted wafer with area array accessible for testing |
| US10381326B2 (en) | 2014-05-28 | 2019-08-13 | Invensas Corporation | Structure and method for integrated circuits packaging with increased density |
| US9735084B2 (en) | 2014-12-11 | 2017-08-15 | Invensas Corporation | Bond via array for thermal conductivity |
| US9888579B2 (en) | 2015-03-05 | 2018-02-06 | Invensas Corporation | Pressing of wire bond wire tips to provide bent-over tips |
| US9502372B1 (en) | 2015-04-30 | 2016-11-22 | Invensas Corporation | Wafer-level packaging using wire bond wires in place of a redistribution layer |
| US9761554B2 (en) | 2015-05-07 | 2017-09-12 | Invensas Corporation | Ball bonding metal wire bond wires to metal pads |
| KR101672640B1 (ko) * | 2015-06-23 | 2016-11-03 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 |
| US9633971B2 (en) | 2015-07-10 | 2017-04-25 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
| US10886250B2 (en) | 2015-07-10 | 2021-01-05 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
| US10490528B2 (en) | 2015-10-12 | 2019-11-26 | Invensas Corporation | Embedded wire bond wires |
| US9490222B1 (en) | 2015-10-12 | 2016-11-08 | Invensas Corporation | Wire bond wires for interference shielding |
| US10332854B2 (en) | 2015-10-23 | 2019-06-25 | Invensas Corporation | Anchoring structure of fine pitch bva |
| US10181457B2 (en) | 2015-10-26 | 2019-01-15 | Invensas Corporation | Microelectronic package for wafer-level chip scale packaging with fan-out |
| US9911718B2 (en) | 2015-11-17 | 2018-03-06 | Invensas Corporation | ‘RDL-First’ packaged microelectronic device for a package-on-package device |
| US9659848B1 (en) | 2015-11-18 | 2017-05-23 | Invensas Corporation | Stiffened wires for offset BVA |
| US9984992B2 (en) | 2015-12-30 | 2018-05-29 | Invensas Corporation | Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces |
| US9935075B2 (en) | 2016-07-29 | 2018-04-03 | Invensas Corporation | Wire bonding method and apparatus for electromagnetic interference shielding |
| TWI822659B (zh) | 2016-10-27 | 2023-11-21 | 美商艾德亞半導體科技有限責任公司 | 用於低溫接合的結構和方法 |
| US10299368B2 (en) | 2016-12-21 | 2019-05-21 | Invensas Corporation | Surface integrated waveguides and circuit structures therefor |
| US11225563B2 (en) | 2017-02-16 | 2022-01-18 | Azotek Co., Ltd. | Circuit board structure and composite for forming insulating substrates |
| US11044802B2 (en) | 2017-02-16 | 2021-06-22 | Azotek Co., Ltd. | Circuit board |
| US10743423B2 (en) * | 2017-09-15 | 2020-08-11 | Azotek Co., Ltd. | Manufacturing method of composite substrate |
| US10813213B2 (en) | 2017-02-16 | 2020-10-20 | Azotek Co., Ltd. | High-frequency composite substrate and insulating structure thereof |
| CN116848631A (zh) | 2020-12-30 | 2023-10-03 | 美商艾德亚半导体接合科技有限公司 | 具有导电特征的结构及其形成方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59178752A (ja) | 1983-03-30 | 1984-10-11 | Hitachi Ltd | 多層配線基板 |
| JPS59198747A (ja) | 1983-04-26 | 1984-11-10 | Nec Corp | 高密度多層配線基板 |
| JPH01308057A (ja) | 1988-06-07 | 1989-12-12 | Matsushita Electric Ind Co Ltd | マルチチップ・パッケージ |
| JP3925752B2 (ja) * | 1997-08-08 | 2007-06-06 | 日立化成工業株式会社 | バンプ付き配線基板及び半導体パッケ−ジの製造法 |
| JPH11298144A (ja) * | 1998-04-15 | 1999-10-29 | Sanwa New Multi Kk | 多層プリント配線板の製造方法 |
| JP3973340B2 (ja) * | 1999-10-05 | 2007-09-12 | Necエレクトロニクス株式会社 | 半導体装置、配線基板、及び、それらの製造方法 |
| JP3653452B2 (ja) * | 2000-07-31 | 2005-05-25 | 株式会社ノース | 配線回路基板とその製造方法と半導体集積回路装置とその製造方法 |
| US6586684B2 (en) * | 2001-06-29 | 2003-07-01 | Intel Corporation | Circuit housing clamp and method of manufacture therefor |
| US8076782B2 (en) * | 2002-04-01 | 2011-12-13 | Ibiden Co., Ltd. | Substrate for mounting IC chip |
| JP3835352B2 (ja) * | 2002-06-03 | 2006-10-18 | 株式会社デンソー | バンプの形成方法及びバンプを有する基板と他の基板との接合方法 |
| KR100455890B1 (ko) * | 2002-12-24 | 2004-11-06 | 삼성전기주식회사 | 커패시터 내장형 인쇄회로기판 및 그 제조 방법 |
| JP2004327945A (ja) * | 2003-04-30 | 2004-11-18 | Ngk Spark Plug Co Ltd | セラミック電子回路部品 |
| FR2879347A1 (fr) * | 2004-12-14 | 2006-06-16 | Commissariat Energie Atomique | Dispositif electronique a deux composants assembles et procede de fabrication d'un tel dispositif |
| FR2879747A1 (fr) | 2004-12-16 | 2006-06-23 | Oreal | Procede d'evaluation in vitro du potentiel protecteur contre la photoimmunosuppression ou du caractere photosensibilisant de produits ou de compositions. |
| US7317249B2 (en) * | 2004-12-23 | 2008-01-08 | Tessera, Inc. | Microelectronic package having stacked semiconductor devices and a process for its fabrication |
| US7911805B2 (en) * | 2007-06-29 | 2011-03-22 | Tessera, Inc. | Multilayer wiring element having pin interface |
-
2007
- 2007-06-29 US US11/824,484 patent/US7911805B2/en active Active
-
2008
- 2008-06-23 WO PCT/US2008/007978 patent/WO2009005696A1/en not_active Ceased
- 2008-06-23 KR KR1020107001200A patent/KR101530896B1/ko active Active
- 2008-06-23 EP EP08779797.3A patent/EP2172089B1/en active Active
- 2008-06-23 CN CN200880101950.6A patent/CN101772995B/zh active Active
- 2008-06-23 JP JP2010514821A patent/JP5421254B2/ja active Active
-
2013
- 2013-11-19 JP JP2013238596A patent/JP6001524B2/ja active Active
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