JP2010192052A5 - - Google Patents

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Publication number
JP2010192052A5
JP2010192052A5 JP2009036575A JP2009036575A JP2010192052A5 JP 2010192052 A5 JP2010192052 A5 JP 2010192052A5 JP 2009036575 A JP2009036575 A JP 2009036575A JP 2009036575 A JP2009036575 A JP 2009036575A JP 2010192052 A5 JP2010192052 A5 JP 2010192052A5
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JP
Japan
Prior art keywords
semiconductor device
memory array
memory
node
control signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009036575A
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English (en)
Japanese (ja)
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JP2010192052A (ja
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Publication date
Application filed filed Critical
Priority to JP2009036575A priority Critical patent/JP2010192052A/ja
Priority claimed from JP2009036575A external-priority patent/JP2010192052A/ja
Publication of JP2010192052A publication Critical patent/JP2010192052A/ja
Publication of JP2010192052A5 publication Critical patent/JP2010192052A5/ja
Pending legal-status Critical Current

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JP2009036575A 2009-02-19 2009-02-19 半導体装置 Pending JP2010192052A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009036575A JP2010192052A (ja) 2009-02-19 2009-02-19 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009036575A JP2010192052A (ja) 2009-02-19 2009-02-19 半導体装置

Publications (2)

Publication Number Publication Date
JP2010192052A JP2010192052A (ja) 2010-09-02
JP2010192052A5 true JP2010192052A5 (enExample) 2012-02-02

Family

ID=42817932

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009036575A Pending JP2010192052A (ja) 2009-02-19 2009-02-19 半導体装置

Country Status (1)

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JP (1) JP2010192052A (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11100966B2 (en) * 2020-01-09 2021-08-24 Winbond Electronics Corp. Array edge repeater in memory device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5965995A (ja) * 1982-10-05 1984-04-14 Toshiba Corp 半導体装置
JPH11111944A (ja) * 1997-09-30 1999-04-23 Hitachi Ltd 半導体集積回路装置
US5966315A (en) * 1997-09-30 1999-10-12 Siemens Aktiengesellschaft Semiconductor memory having hierarchical bit line architecture with non-uniform local bit lines
JP2003115550A (ja) * 2001-10-05 2003-04-18 Nec Microsystems Ltd 半導体記憶装置
JP2004030839A (ja) * 2002-06-27 2004-01-29 Toshiba Corp バースト転送メモリ
KR101129147B1 (ko) * 2006-12-15 2012-03-27 후지쯔 세미컨덕터 가부시키가이샤 컴파일드 메모리, ａｓｉｃ 칩 및 컴파일드 메모리의 레이아웃 방법

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