JP2010192052A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2010192052A
JP2010192052A JP2009036575A JP2009036575A JP2010192052A JP 2010192052 A JP2010192052 A JP 2010192052A JP 2009036575 A JP2009036575 A JP 2009036575A JP 2009036575 A JP2009036575 A JP 2009036575A JP 2010192052 A JP2010192052 A JP 2010192052A
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Japan
Prior art keywords
memory array
memory
semiconductor device
wiring
sub
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Pending
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JP2009036575A
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Japanese (ja)
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JP2010192052A5 (enExample
Inventor
Yoshihiro Shinozaki
義弘 篠崎
Shinpeita Amano
伸平太 天野
Akira Sakamoto
彬 坂本
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Hitachi Solutions Technology Ltd
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Hitachi ULSI Systems Co Ltd
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Application filed by Hitachi ULSI Systems Co Ltd filed Critical Hitachi ULSI Systems Co Ltd
Priority to JP2009036575A priority Critical patent/JP2010192052A/ja
Publication of JP2010192052A publication Critical patent/JP2010192052A/ja
Publication of JP2010192052A5 publication Critical patent/JP2010192052A5/ja
Pending legal-status Critical Current

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  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Dram (AREA)
JP2009036575A 2009-02-19 2009-02-19 半導体装置 Pending JP2010192052A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009036575A JP2010192052A (ja) 2009-02-19 2009-02-19 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009036575A JP2010192052A (ja) 2009-02-19 2009-02-19 半導体装置

Publications (2)

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JP2010192052A true JP2010192052A (ja) 2010-09-02
JP2010192052A5 JP2010192052A5 (enExample) 2012-02-02

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JP2009036575A Pending JP2010192052A (ja) 2009-02-19 2009-02-19 半導体装置

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JP (1) JP2010192052A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113113060A (zh) * 2020-01-09 2021-07-13 华邦电子股份有限公司 存储装置中的阵列边缘中继器

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5965995A (ja) * 1982-10-05 1984-04-14 Toshiba Corp 半導体装置
JPH11111944A (ja) * 1997-09-30 1999-04-23 Hitachi Ltd 半導体集積回路装置
JPH11167792A (ja) * 1997-09-30 1999-06-22 Siemens Ag 混合ローカルビットラインを備えた階層的ビットライン構造を有する半導体メモリ
JP2003115550A (ja) * 2001-10-05 2003-04-18 Nec Microsystems Ltd 半導体記憶装置
JP2004030839A (ja) * 2002-06-27 2004-01-29 Toshiba Corp バースト転送メモリ
WO2008072354A1 (ja) * 2006-12-15 2008-06-19 Fujitsu Microelectronics Limited コンパイルドメモリ、ａｓｉｃチップおよびコンパイルドメモリのレイアウト方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5965995A (ja) * 1982-10-05 1984-04-14 Toshiba Corp 半導体装置
JPH11111944A (ja) * 1997-09-30 1999-04-23 Hitachi Ltd 半導体集積回路装置
JPH11167792A (ja) * 1997-09-30 1999-06-22 Siemens Ag 混合ローカルビットラインを備えた階層的ビットライン構造を有する半導体メモリ
JP2003115550A (ja) * 2001-10-05 2003-04-18 Nec Microsystems Ltd 半導体記憶装置
JP2004030839A (ja) * 2002-06-27 2004-01-29 Toshiba Corp バースト転送メモリ
WO2008072354A1 (ja) * 2006-12-15 2008-06-19 Fujitsu Microelectronics Limited コンパイルドメモリ、ａｓｉｃチップおよびコンパイルドメモリのレイアウト方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113113060A (zh) * 2020-01-09 2021-07-13 华邦电子股份有限公司 存储装置中的阵列边缘中继器
CN113113060B (zh) * 2020-01-09 2024-04-12 华邦电子股份有限公司 存储装置中的阵列边缘中继器

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