JP2009021567A - 半導体装置製造用基板及びその作製方法 - Google Patents
半導体装置製造用基板及びその作製方法 Download PDFInfo
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- JP2009021567A JP2009021567A JP2008148214A JP2008148214A JP2009021567A JP 2009021567 A JP2009021567 A JP 2009021567A JP 2008148214 A JP2008148214 A JP 2008148214A JP 2008148214 A JP2008148214 A JP 2008148214A JP 2009021567 A JP2009021567 A JP 2009021567A
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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Abstract
【解決手段】半導体基板の一表面上に熱CVD法により第1シリコン酸化膜、シリコン窒化膜、及び第2シリコン酸化膜を順次積層形成した後、半導体基板の所定の深さに脆化層を形成する。半導体基板と、絶縁表面を有する基板と、を、対向させ、半導体基板に形成された第2シリコン酸化膜と支持基板とを接合し、加熱処理を行うことにより、半導体基板を脆化層で分離させ、絶縁表面を有する基板上に半導体基板から分離された半導体膜を残存させる半導体装置製造用基板の作製方法である。
【選択図】図2
Description
本形態に係る半導体装置製造用基板はSOI構造を有し、半導体基板から分離させた半導体膜、好ましくは単結晶半導体基板から分離させた単結晶半導体膜を支持基板に転置して形成する。支持基板としては、半導体基板と異なる材料を主成分とする基板を適用する。図1に、本形態に係る半導体装置製造用基板の一形態を示す。
本実施の形態では、本発明に係る半導体装置製造用基板を用いて半導体装置を製造する一例を、図6、図7を用いて説明する。
本実施の形態では、上記実施の形態2と異なる構成の半導体装置を製造する一例を、図8、図9、図10を用いて説明する。
本実施の形態では、本発明に係る半導体装置製造用基板を適用した半導体装置の例を示す。
101 酸化膜
102 半導体基板
103 熱酸化膜
104 第1シリコン酸化膜
106 シリコン窒化膜
108 第2シリコン酸化膜
110 イオン
112 脆化層
120 支持基板
122 バリア膜
124 接合層
140 半導体膜
Claims (19)
- 単結晶半導体基板の一表面上に熱CVD法により第1シリコン酸化膜、シリコン窒化膜、及び第2シリコン酸化膜を順次積層形成し、
前記単結晶半導体基板の所定の深さに脆化層を形成し、
前記単結晶半導体基板と、絶縁表面を有する基板と、を、対向させ、前記単結晶半導体基板に形成された前記第2シリコン酸化膜と前記絶縁表面を有する基板とを接合し、
加熱処理を行うことにより、前記単結晶半導体基板を前記脆化層で分離させ、前記絶縁表面を有する基板上に前記単結晶半導体基板から分離された単結晶半導体膜を残存させることを特徴とする半導体装置製造用基板の作製方法。 - 請求項1において、
前記熱CVD法により、前記第1シリコン酸化膜、前記シリコン窒化膜、及び前記第2シリコン酸化膜を連続成膜することを特徴とする半導体装置製造用基板の作製方法。 - 請求項1又は請求項2において、
前記熱CVD法により、成膜温度600℃以上で前記第1シリコン酸化膜及び前記シリコン窒化膜を成膜することを特徴とする半導体装置製造用基板の作製方法。 - 請求項1乃至請求項3のいずれか一において、
前記第1シリコン酸化膜又は前記第2シリコン酸化膜は、
原料ガスとして、シランガスと、酸化窒素ガスと、を用いることを特徴とする半導体装置製造用基板の作製方法。 - 請求項4において、
前記シランガスとして、モノシラン、ジシラン、又はトリシランを用いることを特徴とする半導体装置製造用基板の作製方法。 - 請求項4において、
前記酸化窒素ガスとして、亜酸化窒素又は二酸化窒素を用いることを特徴とする半導体装置製造用基板の作製方法。 - 請求項1乃至請求項6のいずれか一において、
前記シリコン窒化膜は、
前記原料ガスとして、塩素を含むシランガスと、組成として窒素及び水素を含むガスと、を用いることを特徴とする半導体装置製造用基板の作製方法。 - 請求項7において、
前記塩素を含むシランガスとして、ジクロロシラン又はトリクロロシランを用いることを特徴とする半導体装置製造用基板の作製方法。 - 請求項7において、
前記組成として窒素及び水素を含むガスとして、アンモニア又はヒドラジンを用いることを特徴とする半導体装置製造用基板の作製方法。 - 請求項1乃至請求項9のいずれか一において、
前記単結晶半導体基板は、予め酸化処理を行い表面に酸化膜が形成されており、
前記酸化膜を間に介して前記単結晶半導体基板の一表面上に前記第1シリコン酸化膜、前記シリコン窒化膜、及び前記第2シリコン酸化膜を順次積層形成することを特徴とする半導体装置製造用基板の作製方法。 - 請求項10において、
前記単結晶半導体基板の酸化処理としては、
酸素を含む雰囲気下での熱処理若しくはプラズマ処理、又はUVオゾン処理を適用することを特徴とする半導体装置製造用基板の作製方法。 - 請求項1乃至請求項11のいずれか一において、
前記脆化層は、一或いは複数の同一の原子からなる質量が異なるイオンを照射して形成することを特徴とする半導体装置製造用基板の作製方法。 - 請求項12において、
前記質量が異なるイオンとして、H+イオン、H2 +イオン、又はH3 +イオンを用いることを特徴とする半導体装置製造用基板の作製方法。 - 請求項1乃至請求項13のいずれか一において、
前記絶縁表面を有する基板としては、ガラス基板、石英基板、セラミック基板、サファイヤ基板、又は表面が絶縁膜で被覆された金属基板を用いることを特徴とする半導体装置製造用基板の作製方法。 - 絶縁表面を有する基板上に固定された単結晶半導体膜と、
前記絶縁表面を有する基板と、前記単結晶半導体膜と、の間に順次積層して設けられた第1シリコン酸化膜、シリコン窒化膜、及び第2シリコン酸化膜と、
を有し、
前記シリコン窒化膜は塩素を含むことを特徴とする半導体装置製造用基板。 - 請求項15において、
前記第1シリコン酸化膜、又は前記第2シリコン酸化膜は、
酸化シリコン膜又は酸化窒化シリコン膜であることを特徴とする半導体装置製造用基板。 - 請求項15又は請求項16において、
前記シリコン窒化膜は、
窒化シリコン膜又は窒化酸化シリコン膜であることを特徴とする半導体装置製造用基板。 - 請求項15乃至請求項17のいずれか一において、
前記シリコン窒化膜は塩素を1×1017atoms/cm3以上1×1021atoms/cm3以下の濃度で含むことを特徴とする半導体装置製造用基板。 - 請求項15乃至請求項18のいずれか一において、
前記絶縁表面を有する基板は、ガラス基板、石英基板、セラミック基板、サファイヤ基板、又は表面が絶縁膜で被覆された金属基板であることを特徴とする半導体装置製造用基板。
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