JP2008524843A5 - - Google Patents

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Publication number
JP2008524843A5
JP2008524843A5 JP2007546650A JP2007546650A JP2008524843A5 JP 2008524843 A5 JP2008524843 A5 JP 2008524843A5 JP 2007546650 A JP2007546650 A JP 2007546650A JP 2007546650 A JP2007546650 A JP 2007546650A JP 2008524843 A5 JP2008524843 A5 JP 2008524843A5
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JP
Japan
Prior art keywords
type conductive
region
conductive region
gate contact
sidewall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2007546650A
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English (en)
Japanese (ja)
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JP4335283B2 (ja
JP2008524843A (ja
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Publication date
Priority claimed from US11/012,553 external-priority patent/US7326962B2/en
Application filed filed Critical
Publication of JP2008524843A publication Critical patent/JP2008524843A/ja
Publication of JP2008524843A5 publication Critical patent/JP2008524843A5/ja
Application granted granted Critical
Publication of JP4335283B2 publication Critical patent/JP4335283B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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JP2007546650A 2004-12-15 2005-10-04 ソース領域下に埋込みｎ型およびｐ型領域を有するトランジスタ、およびその製造方法 Expired - Lifetime JP4335283B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/012,553 US7326962B2 (en) 2004-12-15 2004-12-15 Transistors having buried N-type and P-type regions beneath the source region and methods of fabricating the same
PCT/US2005/035505 WO2006065324A2 (en) 2004-12-15 2005-10-04 Transistors having buried n-type and p-type regions beneath the source region and methods of fabricating the same

Publications (3)

Publication Number Publication Date
JP2008524843A JP2008524843A (ja) 2008-07-10
JP2008524843A5 true JP2008524843A5 (enExample) 2008-08-21
JP4335283B2 JP4335283B2 (ja) 2009-09-30

Family

ID=36582806

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007546650A Expired - Lifetime JP4335283B2 (ja) 2004-12-15 2005-10-04 ソース領域下に埋込みｎ型およびｐ型領域を有するトランジスタ、およびその製造方法

Country Status (8)

Country Link
US (1) US7326962B2 (enExample)
EP (1) EP1825517B1 (enExample)
JP (1) JP4335283B2 (enExample)
KR (1) KR101121600B1 (enExample)
AT (1) ATE428187T1 (enExample)
CA (1) CA2590626C (enExample)
DE (1) DE602005013815D1 (enExample)
WO (1) WO2006065324A2 (enExample)

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JP5261923B2 (ja) * 2006-10-17 2013-08-14 サンケン電気株式会社 化合物半導体素子
JP5114947B2 (ja) * 2006-12-28 2013-01-09 富士通株式会社 窒化物半導体装置とその製造方法
JP5564842B2 (ja) 2009-07-10 2014-08-06 サンケン電気株式会社 半導体装置
JP5397289B2 (ja) 2010-03-29 2014-01-22 住友電気工業株式会社 電界効果トランジスタ
JP5879694B2 (ja) * 2011-02-23 2016-03-08 ソニー株式会社 電界効果トランジスタ、半導体スイッチ回路、および通信機器
US8476979B1 (en) 2011-07-07 2013-07-02 The United States Of America As Represented By The Administrator Of National Aeronautics And Space Administration High-efficiency power module
US9024356B2 (en) * 2011-12-20 2015-05-05 Infineon Technologies Austria Ag Compound semiconductor device with buried field plate
US10164038B2 (en) 2013-01-30 2018-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Method of implanting dopants into a group III-nitride structure and device formed
US9385224B2 (en) * 2014-08-13 2016-07-05 Northrop Grumman Systems Corporation Method of forming an integrated multichannel device and single channel device structure
US12484244B2 (en) 2016-06-24 2025-11-25 Wolfspeed, Inc. Group III-nitride high-electron mobility transistors with gate connected buried p-type layers and process for making the same
US11430882B2 (en) 2016-06-24 2022-08-30 Wolfspeed, Inc. Gallium nitride high-electron mobility transistors with p-type layers and process for making the same
US10192980B2 (en) 2016-06-24 2019-01-29 Cree, Inc. Gallium nitride high-electron mobility transistors with deep implanted p-type layers in silicon carbide substrates for power switching and radio frequency applications and process for making the same
US10840334B2 (en) 2016-06-24 2020-11-17 Cree, Inc. Gallium nitride high-electron mobility transistors with deep implanted p-type layers in silicon carbide substrates for power switching and radio frequency applications and process for making the same
US10892356B2 (en) 2016-06-24 2021-01-12 Cree, Inc. Group III-nitride high-electron mobility transistors with buried p-type layers and process for making the same
KR102381395B1 (ko) * 2017-09-18 2022-04-01 한국전기연구원 절연 또는 반절연 ６Ｈ-ＳｉＣ 기판에 구현된 ＳｉＣ 반도체 소자 및 그 제조 방법
US12402346B2 (en) 2021-05-17 2025-08-26 Wolfspeed, Inc. Circuits and group III-nitride transistors with buried p-layers and controlled gate voltages and methods thereof
US11929428B2 (en) 2021-05-17 2024-03-12 Wolfspeed, Inc. Circuits and group III-nitride high-electron mobility transistors with buried p-type layers improving overload recovery and process for implementing the same
US12218202B2 (en) * 2021-09-16 2025-02-04 Wolfspeed, Inc. Semiconductor device incorporating a substrate recess

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