CA2590626C - Transistors having buried n-type and p-type regions beneath the source region and methods of fabricating the same - Google Patents

Transistors having buried n-type and p-type regions beneath the source region and methods of fabricating the same Download PDF

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Publication number
CA2590626C
CA2590626C CA2590626A CA2590626A CA2590626C CA 2590626 C CA2590626 C CA 2590626C CA 2590626 A CA2590626 A CA 2590626A CA 2590626 A CA2590626 A CA 2590626A CA 2590626 C CA2590626 C CA 2590626C
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CA
Canada
Prior art keywords
type conductivity
region
gate contact
sidewall
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CA2590626A
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English (en)
French (fr)
Other versions
CA2590626A1 (en
Inventor
Saptharishi Sriram
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wolfspeed Inc
Original Assignee
Cree Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cree Inc filed Critical Cree Inc
Publication of CA2590626A1 publication Critical patent/CA2590626A1/en
Application granted granted Critical
Publication of CA2590626C publication Critical patent/CA2590626C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/87—FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET]
    • H10D30/877—FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET] having recessed gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/256—Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CA2590626A 2004-12-15 2005-10-04 Transistors having buried n-type and p-type regions beneath the source region and methods of fabricating the same Expired - Lifetime CA2590626C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/012,553 US7326962B2 (en) 2004-12-15 2004-12-15 Transistors having buried N-type and P-type regions beneath the source region and methods of fabricating the same
US11/012,553 2004-12-15
PCT/US2005/035505 WO2006065324A2 (en) 2004-12-15 2005-10-04 Transistors having buried n-type and p-type regions beneath the source region and methods of fabricating the same

Publications (2)

Publication Number Publication Date
CA2590626A1 CA2590626A1 (en) 2006-06-22
CA2590626C true CA2590626C (en) 2014-04-08

Family

ID=36582806

Family Applications (1)

Application Number Title Priority Date Filing Date
CA2590626A Expired - Lifetime CA2590626C (en) 2004-12-15 2005-10-04 Transistors having buried n-type and p-type regions beneath the source region and methods of fabricating the same

Country Status (8)

Country Link
US (1) US7326962B2 (enExample)
EP (1) EP1825517B1 (enExample)
JP (1) JP4335283B2 (enExample)
KR (1) KR101121600B1 (enExample)
AT (1) ATE428187T1 (enExample)
CA (1) CA2590626C (enExample)
DE (1) DE602005013815D1 (enExample)
WO (1) WO2006065324A2 (enExample)

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JP5261923B2 (ja) * 2006-10-17 2013-08-14 サンケン電気株式会社 化合物半導体素子
JP5114947B2 (ja) * 2006-12-28 2013-01-09 富士通株式会社 窒化物半導体装置とその製造方法
JP5564842B2 (ja) 2009-07-10 2014-08-06 サンケン電気株式会社 半導体装置
JP5397289B2 (ja) 2010-03-29 2014-01-22 住友電気工業株式会社 電界効果トランジスタ
JP5879694B2 (ja) * 2011-02-23 2016-03-08 ソニー株式会社 電界効果トランジスタ、半導体スイッチ回路、および通信機器
US8476979B1 (en) 2011-07-07 2013-07-02 The United States Of America As Represented By The Administrator Of National Aeronautics And Space Administration High-efficiency power module
US9024356B2 (en) * 2011-12-20 2015-05-05 Infineon Technologies Austria Ag Compound semiconductor device with buried field plate
US10164038B2 (en) 2013-01-30 2018-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Method of implanting dopants into a group III-nitride structure and device formed
US9385224B2 (en) * 2014-08-13 2016-07-05 Northrop Grumman Systems Corporation Method of forming an integrated multichannel device and single channel device structure
US12484244B2 (en) 2016-06-24 2025-11-25 Wolfspeed, Inc. Group III-nitride high-electron mobility transistors with gate connected buried p-type layers and process for making the same
US11430882B2 (en) 2016-06-24 2022-08-30 Wolfspeed, Inc. Gallium nitride high-electron mobility transistors with p-type layers and process for making the same
US10192980B2 (en) 2016-06-24 2019-01-29 Cree, Inc. Gallium nitride high-electron mobility transistors with deep implanted p-type layers in silicon carbide substrates for power switching and radio frequency applications and process for making the same
US10840334B2 (en) 2016-06-24 2020-11-17 Cree, Inc. Gallium nitride high-electron mobility transistors with deep implanted p-type layers in silicon carbide substrates for power switching and radio frequency applications and process for making the same
US10892356B2 (en) 2016-06-24 2021-01-12 Cree, Inc. Group III-nitride high-electron mobility transistors with buried p-type layers and process for making the same
KR102381395B1 (ko) * 2017-09-18 2022-04-01 한국전기연구원 절연 또는 반절연 ６Ｈ-ＳｉＣ 기판에 구현된 ＳｉＣ 반도체 소자 및 그 제조 방법
US12402346B2 (en) 2021-05-17 2025-08-26 Wolfspeed, Inc. Circuits and group III-nitride transistors with buried p-layers and controlled gate voltages and methods thereof
US11929428B2 (en) 2021-05-17 2024-03-12 Wolfspeed, Inc. Circuits and group III-nitride high-electron mobility transistors with buried p-type layers improving overload recovery and process for implementing the same
US12218202B2 (en) * 2021-09-16 2025-02-04 Wolfspeed, Inc. Semiconductor device incorporating a substrate recess

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Also Published As

Publication number Publication date
JP4335283B2 (ja) 2009-09-30
EP1825517B1 (en) 2009-04-08
ATE428187T1 (de) 2009-04-15
US7326962B2 (en) 2008-02-05
US20060125001A1 (en) 2006-06-15
KR101121600B1 (ko) 2012-02-28
WO2006065324A3 (en) 2006-10-19
JP2008524843A (ja) 2008-07-10
DE602005013815D1 (de) 2009-05-20
KR20070087046A (ko) 2007-08-27
EP1825517A2 (en) 2007-08-29
CA2590626A1 (en) 2006-06-22
WO2006065324A2 (en) 2006-06-22

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