JP2008147632A - 有機強誘電体膜の形成方法、記憶素子の製造方法、記憶装置、および電子機器 - Google Patents

有機強誘電体膜の形成方法、記憶素子の製造方法、記憶装置、および電子機器 Download PDF

Info

Publication number
JP2008147632A
JP2008147632A JP2007290164A JP2007290164A JP2008147632A JP 2008147632 A JP2008147632 A JP 2008147632A JP 2007290164 A JP2007290164 A JP 2007290164A JP 2007290164 A JP2007290164 A JP 2007290164A JP 2008147632 A JP2008147632 A JP 2008147632A
Authority
JP
Japan
Prior art keywords
film
organic ferroelectric
forming
crystallinity
ferroelectric film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2007290164A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008147632A5 (enExample
Inventor
Hiroshi Takiguchi
宏志 瀧口
Junichi Karasawa
潤一 柄沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2007290164A priority Critical patent/JP2008147632A/ja
Priority to US11/937,197 priority patent/US20080135900A1/en
Priority to KR1020070114744A priority patent/KR20080043239A/ko
Publication of JP2008147632A publication Critical patent/JP2008147632A/ja
Priority to US12/578,481 priority patent/US20100022032A1/en
Publication of JP2008147632A5 publication Critical patent/JP2008147632A5/ja
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0415—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having ferroelectric gate insulators
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/689—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having ferroelectric layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Insulating Bodies (AREA)
  • Manufacture Of Macromolecular Shaped Articles (AREA)
  • Formation Of Insulating Films (AREA)
JP2007290164A 2006-11-13 2007-11-07 有機強誘電体膜の形成方法、記憶素子の製造方法、記憶装置、および電子機器 Withdrawn JP2008147632A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2007290164A JP2008147632A (ja) 2006-11-13 2007-11-07 有機強誘電体膜の形成方法、記憶素子の製造方法、記憶装置、および電子機器
US11/937,197 US20080135900A1 (en) 2006-11-13 2007-11-08 Method of forming organic ferroelectric film, method of manufacturing memory element, memory device, and electronic apparatus
KR1020070114744A KR20080043239A (ko) 2006-11-13 2007-11-12 유기 강유전체막의 형성 방법, 기억 소자의 제조 방법,기억 장치, 및 전자 기기
US12/578,481 US20100022032A1 (en) 2006-11-13 2009-10-13 Method of forming organic ferroelectric film, method of manufacturing memory element, memory device, and electronic apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006307153 2006-11-13
JP2007290164A JP2008147632A (ja) 2006-11-13 2007-11-07 有機強誘電体膜の形成方法、記憶素子の製造方法、記憶装置、および電子機器

Publications (2)

Publication Number Publication Date
JP2008147632A true JP2008147632A (ja) 2008-06-26
JP2008147632A5 JP2008147632A5 (enExample) 2010-11-18

Family

ID=39480511

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007290164A Withdrawn JP2008147632A (ja) 2006-11-13 2007-11-07 有機強誘電体膜の形成方法、記憶素子の製造方法、記憶装置、および電子機器

Country Status (3)

Country Link
JP (1) JP2008147632A (enExample)
KR (1) KR20080043239A (enExample)
CN (1) CN101188198A (enExample)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011080058A (ja) * 2009-09-14 2011-04-21 Ideal Star Inc フッ化ビニリデンと、トリフルオロエチレン又はテトラフルオロチレンとの共重合体とフラーレンとの混合膜及びその製造方法
JP2011159848A (ja) * 2010-02-02 2011-08-18 Toshiba Corp 固体撮像装置およびその製造方法
JP2013043903A (ja) * 2011-08-22 2013-03-04 Kureha Corp 所望のキュリー温度を有するポリマーの製造方法
WO2013069470A1 (ja) * 2011-11-09 2013-05-16 独立行政法人科学技術振興機構 固体電子装置
JP2015156449A (ja) * 2014-02-21 2015-08-27 国立研究開発法人産業技術総合研究所 有機強誘電体薄膜の製造方法
KR20150129801A (ko) * 2013-03-14 2015-11-20 사우디 베이식 인더스트리즈 코포레이션 개선된 피로 및 항복 특성을 동반하는 강유전성 축전기
JP2016171152A (ja) * 2015-03-12 2016-09-23 ペクセル・テクノロジーズ株式会社 ペロブスカイト化合物を用いた強誘電体メモリ素子およびその製造方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101276560B1 (ko) * 2011-03-17 2013-06-24 한국과학기술원 강유전체 폴리머 나노도트 소자 및 그 제조를 위한 디웨팅 프로세스

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011080058A (ja) * 2009-09-14 2011-04-21 Ideal Star Inc フッ化ビニリデンと、トリフルオロエチレン又はテトラフルオロチレンとの共重合体とフラーレンとの混合膜及びその製造方法
JP2011159848A (ja) * 2010-02-02 2011-08-18 Toshiba Corp 固体撮像装置およびその製造方法
JP2013043903A (ja) * 2011-08-22 2013-03-04 Kureha Corp 所望のキュリー温度を有するポリマーの製造方法
WO2013069470A1 (ja) * 2011-11-09 2013-05-16 独立行政法人科学技術振興機構 固体電子装置
JP5293983B1 (ja) * 2011-11-09 2013-09-18 独立行政法人科学技術振興機構 固体電子装置
US9293257B2 (en) 2011-11-09 2016-03-22 Japan Science And Technology Agency Solid-state electronic device including dielectric bismuth niobate film formed from solution
KR20150129801A (ko) * 2013-03-14 2015-11-20 사우디 베이식 인더스트리즈 코포레이션 개선된 피로 및 항복 특성을 동반하는 강유전성 축전기
JP2016519690A (ja) * 2013-03-14 2016-07-07 サウジ・ベーシック・インダストリーズ・コーポレーション 疲労特性および破壊特性が改善された強誘電体キャパシタ
KR102043488B1 (ko) * 2013-03-14 2019-11-11 사우디 베이식 인더스트리즈 코포레이션 개선된 피로 및 항복 특성을 동반하는 강유전성 축전기
JP2015156449A (ja) * 2014-02-21 2015-08-27 国立研究開発法人産業技術総合研究所 有機強誘電体薄膜の製造方法
JP2016171152A (ja) * 2015-03-12 2016-09-23 ペクセル・テクノロジーズ株式会社 ペロブスカイト化合物を用いた強誘電体メモリ素子およびその製造方法

Also Published As

Publication number Publication date
CN101188198A (zh) 2008-05-28
KR20080043239A (ko) 2008-05-16

Similar Documents

Publication Publication Date Title
JP2008147632A (ja) 有機強誘電体膜の形成方法、記憶素子の製造方法、記憶装置、および電子機器
TWI447980B (zh) A transistor, an organic semiconductor element, and the like
JP4867168B2 (ja) 有機薄膜トランジスタの製造方法
CN1898747B (zh) 利用有机双极半导体的非易失性铁电薄膜设备和所述设备的制备方法
KR20090040199A (ko) 다층 바이폴라 전계효과 트랜지스터 및 그의 제조방법
US7955869B2 (en) Nonvolatile memory devices and methods of fabricating the same
JP2007258282A (ja) 半導体装置、半導体装置の製造方法および記憶装置
JP2005159360A (ja) 有機薄膜トランジスター
Kallitsis et al. Photopatternable high-k fluoropolymer dielectrics bearing pendent azido groups
US20100022032A1 (en) Method of forming organic ferroelectric film, method of manufacturing memory element, memory device, and electronic apparatus
US20070281372A1 (en) Memory element, method for manufacturing memory element, memory device, electronic apparatus and method for manufacturing transistor
JP2003309265A (ja) 有機薄膜トランジスタ及び有機薄膜トランジスタの製造方法
JP2009295678A (ja) 半導体装置の製造方法、強誘電体素子の製造方法および電子機器の製造方法
JP4736318B2 (ja) 積層体の製造方法及び有機電界効果トランジスタの製造方法
JP5241489B2 (ja) 強誘電体メモリ装置の製造方法
JP2004055649A (ja) 有機薄膜トランジスタ及びその製造方法
JP2007173728A (ja) 有機強誘電体キャパシタの製造方法、有機強誘電体キャパシタ、有機強誘電体メモリ、および電子機器
JP2004064059A (ja) 有機薄膜トランジスタ、有機薄膜トランジスタシート及びこれらの製造方法
JP2007134354A (ja) 有機強誘電体キャパシタの製造方法、有機強誘電体キャパシタ、有機強誘電体メモリ、および電子機器
JP5724529B2 (ja) 半導体装置の製造方法、強誘電体素子の製造方法および電子機器の製造方法
JP2004273678A (ja) 有機薄膜トランジスタ
JP2015111741A (ja) 半導体装置
JP4345317B2 (ja) 有機薄膜トランジスタ素子
JP2008198804A (ja) 有機強誘電体メモリの製造方法、有機強誘電体キャパシタ、有機強誘電体メモリ、および電子機器
TWI664758B (zh) 有機半導體薄膜的形成方法，以及使用了該方法之有機半導體裝置與其製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20101004

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20101004

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110428

A761 Written withdrawal of application

Free format text: JAPANESE INTERMEDIATE CODE: A761

Effective date: 20111219