CN101188198A - 有机强电介质膜的形成法、存储元件的制法、存储装置 - Google Patents

有机强电介质膜的形成法、存储元件的制法、存储装置 Download PDF

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Publication number
CN101188198A
CN101188198A CNA2007101681560A CN200710168156A CN101188198A CN 101188198 A CN101188198 A CN 101188198A CN A2007101681560 A CNA2007101681560 A CN A2007101681560A CN 200710168156 A CN200710168156 A CN 200710168156A CN 101188198 A CN101188198 A CN 101188198A
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CN
China
Prior art keywords
mentioned
film
organic ferroelectric
crystallinity
ferroelectric film
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Pending
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CNA2007101681560A
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English (en)
Chinese (zh)
Inventor
泷口宏志
柄泽润一
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Seiko Epson Corp
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Seiko Epson Corp
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Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of CN101188198A publication Critical patent/CN101188198A/zh
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0415Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having ferroelectric gate insulators
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/689Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having ferroelectric layers

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Insulating Bodies (AREA)
  • Manufacture Of Macromolecular Shaped Articles (AREA)
  • Formation Of Insulating Films (AREA)
CNA2007101681560A 2006-11-13 2007-11-13 有机强电介质膜的形成法、存储元件的制法、存储装置 Pending CN101188198A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006307153 2006-11-13
JP2006307153 2006-11-13
JP2007290164 2007-11-07

Publications (1)

Publication Number Publication Date
CN101188198A true CN101188198A (zh) 2008-05-28

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CNA2007101681560A Pending CN101188198A (zh) 2006-11-13 2007-11-13 有机强电介质膜的形成法、存储元件的制法、存储装置

Country Status (3)

Country Link
JP (1) JP2008147632A (enExample)
KR (1) KR20080043239A (enExample)
CN (1) CN101188198A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103999207A (zh) * 2011-11-09 2014-08-20 独立行政法人科学技术振兴机构 固体电子装置

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5957648B2 (ja) * 2009-09-14 2016-07-27 株式会社イデアルスター フッ化ビニリデンと、トリフルオロエチレン又はテトラフルオロエチレンとの共重合体とフラーレンとの混合膜及びその製造方法
JP2011159848A (ja) * 2010-02-02 2011-08-18 Toshiba Corp 固体撮像装置およびその製造方法
KR101276560B1 (ko) * 2011-03-17 2013-06-24 한국과학기술원 강유전체 폴리머 나노도트 소자 및 그 제조를 위한 디웨팅 프로세스
JP5926903B2 (ja) * 2011-08-22 2016-05-25 株式会社クレハ 所望のキュリー温度を有するポリマーの製造方法
KR102043488B1 (ko) * 2013-03-14 2019-11-11 사우디 베이식 인더스트리즈 코포레이션 개선된 피로 및 항복 특성을 동반하는 강유전성 축전기
JP6229532B2 (ja) * 2014-02-21 2017-11-15 国立研究開発法人産業技術総合研究所 有機強誘電体薄膜の製造方法
JP2016171152A (ja) * 2015-03-12 2016-09-23 ペクセル・テクノロジーズ株式会社 ペロブスカイト化合物を用いた強誘電体メモリ素子およびその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103999207A (zh) * 2011-11-09 2014-08-20 独立行政法人科学技术振兴机构 固体电子装置
CN103999207B (zh) * 2011-11-09 2017-07-28 国立研究开发法人科学技术振兴机构 固体电子装置

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Publication number Publication date
KR20080043239A (ko) 2008-05-16
JP2008147632A (ja) 2008-06-26

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Open date: 20080528