JP2007513519A - フラッシュメモリデバイス - Google Patents
フラッシュメモリデバイス Download PDFInfo
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- JP2007513519A JP2007513519A JP2006542575A JP2006542575A JP2007513519A JP 2007513519 A JP2007513519 A JP 2007513519A JP 2006542575 A JP2006542575 A JP 2006542575A JP 2006542575 A JP2006542575 A JP 2006542575A JP 2007513519 A JP2007513519 A JP 2007513519A
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- 230000006870 function Effects 0.000 claims abstract description 28
- 238000003860 storage Methods 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims description 14
- 150000004767 nitrides Chemical class 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 description 26
- 229910052710 silicon Inorganic materials 0.000 description 26
- 239000010703 silicon Substances 0.000 description 26
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 24
- 239000000463 material Substances 0.000 description 11
- 238000000034 method Methods 0.000 description 11
- 238000005530 etching Methods 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 238000002513 implantation Methods 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 4
- 229910052732 germanium Inorganic materials 0.000 description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 3
- -1 SiO 2 Chemical compound 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
Claims (10)
- 一部がメモリデバイス(100)のソース領域(1010)として機能する第1導電層(130)と、
前記第1導電層上に形成された、第1端部及び前記第1端部の反対側に第2端部を有する導電構造であって、前記第1端部は、前記メモリデバイス(100)の前記ソース領域(1010)として機能する前記第1導電層(130)部に隣接して配置され、前記第2端部は前記メモリデバイス(100)のドレイン領域(1005)として機能する導電構造(210)と、
前記導電構造(210)の少なくとも一部の周りに形成された複数の誘電層(410−430)であって、少なくとも前記誘電層(410−430)の1つは、前記メモリデバイス(100)の浮遊ゲート電極として機能する複数の誘電層(410−430)と、
前記複数の誘電層(410−430)上に形成された制御ゲート(510)とを含む、メモリデバイス(100)。 - 前記導電構造(210)は、実質的に円筒形である、請求項1に記載のメモリデバイス(100)。
- 前記導電構造(210)の膜厚は、約100Å〜1000Åの範囲内の値をとり、幅は、約100Å〜1000Åの範囲内の値をとる、請求項2に記載のメモリデバイス(100)。
- 前記複数の誘電層(410−430)は、
前記導電構造(210)の周りに形成された第1酸化層(410)、
前記第1酸化層(410)の周りに形成された窒化物層(420)、及び、
前記浮遊ゲート電極として機能する前記窒化物層(420)の周りに形成された第2酸化層(430)を含む、請求項1に記載のメモリデバイス(100)。 - 基板(110)、及び、
前記基板(110)上に形成された埋め込み酸化層(120)を含み、前記第1導電層(130)は前記埋め込み酸化層(120)上に形成される、請求項1に記載のメモリデバイス(100)。 - 基板(110)、および、
前記基板(110)上に形成された第1絶縁層(120)を含むメモリデバイス(100)であって、前記メモリデバイス(100)は、
前記メモリデバイス(100)のチャネル領域として機能する前記第1絶縁層(120)上に形成された導電構造(210)と、
少なくとも1つが前記メモリデバイス(100)の電荷蓄積電極として機能する、前記導電構造の少なくとも一部の周りに形成された複数の誘電層(410−430)と、
前記複数の誘電層(410−430)上に形成された制御ゲート(510)とを備えることを特徴とする、メモリデバイス。 - 前記第1絶縁層(120)と前記導電構造(210)との間に形成された導電層(130)であって、前記導電構造(210)に隣接する前記導電層(130)の一部は、前記メモリデバイス(100)のソース領域(1010)として機能する導電構造(130)と、
前記第1導電層(130)上に、かつ、前記導電構造(210)の底部に隣接して形成された第2絶縁層(310)とを含む、請求項6に記載のメモリデバイス(100)。 - 前記複数の誘電層(410−430)の膜厚は、全体で約300Å〜約1500Åの範囲内の値をとる、請求項6に記載のメモリデバイス(100)。
- 基板(110)上に形成された第1導電層(130)であって、前記第1導電層(130)部は、メモリアレイのメモリセルのソース領域として機能する第1導電部(130)と、
前記第1導電層(130)上に形成され、各々がメモリセルの1つのチャネル領域として機能する複数の構造(210)と、
前記複数の構造(210)の各々の部分の周りに形成された複数の誘電層(410−430)であって、前記複数の誘電層(410−430)のうちの少なくとも1つは、前記メモリセルのうちの1つの電荷蓄積電極として機能する複数の誘電層(410−430)と、
前記メモリセルの各々についての、前記複数の誘電層(410−430)上に形成された、少なくとも1つの導電層(510)とを備える、
不揮発性メモリアレイ(100)。 - 複数のビット線(910)を更に備え、
前記複数のビット線(910)の各々は前記複数の構造(210)と接触し、
前記少なくとも1つの導電層(510)は複数の導電層(510)を含み、
前記導電層(510)の各々は、メモリセルのグループに関連づけられる前記複数の誘電層のうちの上部の層に接触し、前記不揮発性メモリアレイ(100)のワード線として機能する、請求項9に記載の不揮発性メモリアレイ(100)。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/726,508 US6933558B2 (en) | 2003-12-04 | 2003-12-04 | Flash memory device |
PCT/US2004/035482 WO2005062310A1 (en) | 2003-12-04 | 2004-10-26 | Flash memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2007513519A true JP2007513519A (ja) | 2007-05-24 |
Family
ID=34633347
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006542575A Pending JP2007513519A (ja) | 2003-12-04 | 2004-10-26 | フラッシュメモリデバイス |
Country Status (8)
Country | Link |
---|---|
US (1) | US6933558B2 (ja) |
JP (1) | JP2007513519A (ja) |
KR (1) | KR101142990B1 (ja) |
CN (1) | CN1886803B (ja) |
DE (1) | DE112004002399T5 (ja) |
GB (1) | GB2424518B (ja) |
TW (1) | TWI358134B (ja) |
WO (1) | WO2005062310A1 (ja) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10220923B4 (de) * | 2002-05-10 | 2006-10-26 | Infineon Technologies Ag | Verfahren zur Herstellung eines nicht-flüchtigen Flash-Halbleiterspeichers |
KR100598109B1 (ko) * | 2004-10-08 | 2006-07-07 | 삼성전자주식회사 | 비휘발성 기억 소자 및 그 형성 방법 |
US7825460B2 (en) * | 2006-09-06 | 2010-11-02 | International Business Machines Corporation | Vertical field effect transistor arrays and methods for fabrication thereof |
US8785268B2 (en) * | 2006-12-21 | 2014-07-22 | Spansion Llc | Memory system with Fin FET technology |
US8779495B2 (en) * | 2007-04-19 | 2014-07-15 | Qimonda Ag | Stacked SONOS memory |
JP5196500B2 (ja) * | 2007-05-24 | 2013-05-15 | 独立行政法人産業技術総合研究所 | 記憶素子及びその読み出し方法 |
KR100878347B1 (ko) * | 2007-05-28 | 2009-01-15 | 한양대학교 산학협력단 | 소노스 메모리 소자 및 그 제조 방법 |
US7898021B2 (en) * | 2007-10-26 | 2011-03-01 | International Business Machines Corporation | Semiconductor fin based nonvolatile memory device and method for fabrication thereof |
KR100950044B1 (ko) | 2008-04-14 | 2010-03-29 | 한양대학교 산학협력단 | 멀티비트 플래시 메모리 소자 및 플래시 메모리, 그리고플래시 메모리 소자의 구동 장치 및 방법 |
US7781817B2 (en) * | 2008-06-26 | 2010-08-24 | International Business Machines Corporation | Structures, fabrication methods, and design structures for multiple bit flash memory cells |
US8461640B2 (en) | 2009-09-08 | 2013-06-11 | Silicon Storage Technology, Inc. | FIN-FET non-volatile memory cell, and an array and method of manufacturing |
JP6306233B1 (ja) * | 2017-02-28 | 2018-04-04 | ウィンボンド エレクトロニクス コーポレーション | フラッシュメモリおよびその製造方法 |
US10276728B2 (en) * | 2017-07-07 | 2019-04-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device including non-volatile memory cells |
CN109285838B (zh) * | 2018-08-28 | 2023-05-02 | 中国科学院微电子研究所 | 半导体存储设备及其制造方法及包括存储设备的电子设备 |
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JPH0479369A (ja) * | 1990-07-23 | 1992-03-12 | Toshiba Corp | 不揮発性半導体記憶装置 |
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-
2003
- 2003-12-04 US US10/726,508 patent/US6933558B2/en not_active Expired - Lifetime
-
2004
- 2004-10-26 WO PCT/US2004/035482 patent/WO2005062310A1/en active Application Filing
- 2004-10-26 KR KR1020067011090A patent/KR101142990B1/ko active IP Right Grant
- 2004-10-26 JP JP2006542575A patent/JP2007513519A/ja active Pending
- 2004-10-26 DE DE112004002399T patent/DE112004002399T5/de not_active Ceased
- 2004-10-26 CN CN2004800347670A patent/CN1886803B/zh active Active
- 2004-10-26 GB GB0612036A patent/GB2424518B/en active Active
- 2004-12-03 TW TW093137306A patent/TWI358134B/zh active
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JPH0479369A (ja) * | 1990-07-23 | 1992-03-12 | Toshiba Corp | 不揮発性半導体記憶装置 |
JPH0878635A (ja) * | 1994-08-31 | 1996-03-22 | Toshiba Corp | 半導体記憶装置 |
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Also Published As
Publication number | Publication date |
---|---|
GB0612036D0 (en) | 2006-07-26 |
US6933558B2 (en) | 2005-08-23 |
KR101142990B1 (ko) | 2012-05-11 |
GB2424518A (en) | 2006-09-27 |
WO2005062310A1 (en) | 2005-07-07 |
TWI358134B (en) | 2012-02-11 |
TW200532923A (en) | 2005-10-01 |
CN1886803B (zh) | 2011-09-14 |
CN1886803A (zh) | 2006-12-27 |
DE112004002399T5 (de) | 2006-10-19 |
GB2424518B (en) | 2007-07-04 |
US20050121716A1 (en) | 2005-06-09 |
KR20060123264A (ko) | 2006-12-01 |
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