JP2007258489A - 多層プリント配線板及びその部品実装方法 - Google Patents
多層プリント配線板及びその部品実装方法 Download PDFInfo
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Abstract
【解決手段】表面側及び裏面側の両方又は片方に、電子部品等実装用の複数個の半田バンプが形成された多層プリント配線板の部品実装方法であって、前記半田バンプは、各々、第1半田、第2半田及び第3半田のいずれから形成し、第1半田、第2半田及び第3半田の融点は、温度の高い方から、第1半田、第2半田、第3半田の順番となっているとき、融点温度の高い方から順番に電子部品等を半田付けする。更に、この際、半田バンプの体積が大きい方を先に半田付けすることが好ましい。
【選択図】図2
Description
図1は、第1実施形態に係る多層プリント配線板10の構成の一例を示す図であり、図2は、この多層プリント配線板10に電子部品等を実装した状態を示す図である。
(1)半田の融点、
(2)半田バンプの体積(熱容量)、
(3)電子部品等の形態及び実装方式、
先ず、(1)の半田の融点の観点から、多層プリント配線板10に対する電子部品等の実装を決定する場合について説明する。
(i)接続ポイント当たりの荷重が大きい箇所(即ち、比較的大きい体積)の半田バンプを比較的融点の高い半田で構成する。先に半田付けした融点の高い半田バンプが、その後に融点の低い半田バンプを溶融する際に容易に再溶融せず、接続不良・位置ズレ等を起こさないようにするためである。
(ii)接続ポイント当たりの荷重が小さい箇所(即ち、比較的小さい体積)の半田バンプを比較的融点の高い半田で構成する。多層プリント配線板が高温に曝される時間を出来るだけ短縮して、熱的損傷を最小限にするためである。
図3は、第2実施形態に係る多層プリント配線板40の構成の一例を示す図であり、図4は、この多層プリント配線板40に電子部品等を実装した状態を示す図である。
(1)半田の融点、
(2)半田バンプの体積(熱容量)、
(3)電子部品等の形態及び実装方式、
先ず、(1)の半田の融点の観点から、多層プリント配線板40に対する電子部品等の実装を決定する場合について説明する。
上記第1及び第2の実施形態で用いた多層プリント配線板の製造方法の一例に関して、簡単に説明する。多層プリント配線板の製造方法としては、めっきスルーホール法と新方式プロセス法が知られている。新方式プロセス法としては、めっき法ビルドアップ法,導電ペースト法ビルドアップ法,ビルドアップ転写法,転写法,柱状めっきビルドアップ法,一括積層法等がある。更に、めっき法ビルドアップ法に関しても、材料と穴明け法により、樹脂付銅箔方式,熱硬化性樹脂方式,感光性絶縁樹脂方式等に分類される。ここでは、本出願人が、比較的多く採用しているめっき法ビルドアップ法の熱硬化性樹脂方式に沿って説明する。
(1)本実施形態によれば、多層プリント配線板の表面側及び裏面側の両面又は片面に対して、異なる接続方式(フリップチップと非フリップチップ)の電子部品等を実装することができる。
(2)本実施形態によれば、半田の融点、の半田バンプの体積(熱容量)、又はの電子部品等の形態及び実装方式のいずれかの観点から、多層プリント配線板の半田バンプの組成、形状、部品実装の順序等を決定することができる。
(3)本実施形態によれば、半田バンプの体積(熱容量)の相違に加えて、半田の融点を加味して、又は電子部品等の形態及び実装方式の相違に加えて、半田の融点を加味して、多層プリント配線板の半田バンプの組成、形状、部品実装の順序等を決定することができる。
以上、本発明に係る多層プリント配線板及びその部品実装方法の実施形態に関して説明したが、これらは例示であって、本発明はこれに限定されない。本発明は、当業者が日常的になしえる追加・変更・削除を含むものである。
Claims (13)
- 表面側及び裏面側の両方又は片方に電子部品等実装用の複数個の半田バンプが形成された多層プリント配線板であって、
前記半田バンプは、各々、第1半田、第2半田及び第3半田のいずれから形成され、第1半田、第2半田及び第3半田の融点が夫々異なっている、多層プリント配線板。 - 請求項1に記載の多層プリント配線板において、
前記第1半田、第2半田及び第3半田の融点は、温度の高い方から、第1半田の融点、第2半田の融点、第3半田の融点の順番となっている、多層プリント配線板。 - 請求項1に記載の多層プリント配線板において、
各半田の融点差は、10°C以上、40°C以下である、多層プリント配線板。 - 請求項3に記載の多層プリント配線板において、
各半田の融点差は、25°C以上である、多層プリント配線板。 - 表面側及び裏面側の両方又は片方に電子部品等実装用の複数個の半田バンプが形成された多層プリント配線板であって、
前記半田バンプは、搭載電子部品等に対応してその体積が異なっている、多層プリント配線板。 - 請求項5に記載の多層プリント配線板において、
前記半田バンプは、フリップチップ接続型の表面実装部品を実装する半田バンプの体積と非フリップチップ接続型の表面実装部品を実装する半田バンプの体積の比は、1:2〜1:4である、多層プリント配線板。 - 表面側及び裏面側の両方又は片方に電子部品等実装用の複数個の半田バンプが形成された多層プリント配線板であって、
前記半田バンプは、搭載電子部品等の接続ポイント当たりの部品荷重に対応して形成されている、多層プリント配線板。 - 請求項7に記載の多層プリント配線板において、
搭載電子部品等の接続ポイント当たりの部品荷重が比較的大きければ前記半田バンプの体積は比較的大きく、搭載電子部品等の接続ポイント当たりの部品荷重が比較的小さければ前記半田バンプの体積は比較的小さい、多層プリント配線板。 - 表面側及び裏面側の両方又は片方に電子部品等実装用の複数個の半田バンプが形成された多層プリント配線板であって、
前記半田バンプは、各々、第1半田、第2半田、第3半田及び第4半田のいずれから形成され、第1半田、第2半田、第3半田及び第4半田の融点が夫々異なっている、多層プリント配線板。 - 請求項9に記載の多層プリント配線板において、
前記第1半田、第2半田、第3半田及び第4半田の融点は、温度の高い方から、第1半田の融点、第2半田の融点、第3半田、第4半田の融点の順番となっている、多層プリント配線板。 - 表面側及び裏面側の両方又は片方に電子部品等実装用の複数個の半田バンプが形成された多層プリント配線板の部品実装方法において、
前記半田バンプは、各々、第1半田、第2半田及び第3半田のいずれから形成し、第1半田、第2半田及び第3半田の融点は、温度の高い方から、第1半田、第2半田、第3半田の順番となっているとき、
融点温度の高い方から順番に電子部品等を半田付けする、多層プリント配線板の部品実装方法。 - 表面側及び裏面側の両方又は片方に電子部品等実装用の複数個の半田バンプが形成された多層プリント配線板の部品実装方法において、
フリップチップ接続型の表面実装部品を実装する前記半田バンプの体積は比較的小さく、非フリップチップ接続型の表面実装部品を実装する半田バンプの体積は比較的大きいとき、
半田バンプの体積が大きい方を先に半田付けする、多層プリント配線板の部品実装方法。 - 表面側及び裏面側の両方又は片方に電子部品等実装用の複数個の半田バンプが形成された多層プリント配線板の部品実装方法において、
搭載電子部品等の接続ポイント当たりの部品荷重が比較的小さ方を先に半田付けをする、多層プリント配線板の部品実装方法。
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CN200780000748XA CN101331813B (zh) | 2006-03-23 | 2007-02-01 | 多层印刷线路板以及其部件安装方法 |
PCT/JP2007/051736 WO2007108237A1 (ja) | 2006-03-23 | 2007-02-01 | 多層プリント配線板及びその部品実装方法 |
TW096104407A TW200806134A (en) | 2006-03-23 | 2007-02-07 | Multilayer printed wiring circuit board and mounting method for component thereof |
US11/689,858 US7566835B2 (en) | 2006-03-23 | 2007-03-22 | Multilayer printed wiring board and component mounting method thereof |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011249457A (ja) * | 2010-05-25 | 2011-12-08 | Dainippon Printing Co Ltd | 部品内蔵配線板、部品内蔵配線板の製造方法 |
US10660216B1 (en) | 2018-11-18 | 2020-05-19 | Lenovo (Singapore) Pte. Ltd. | Method of manufacturing electronic board and mounting sheet |
CN111199921A (zh) * | 2018-11-18 | 2020-05-26 | 联想(新加坡)私人有限公司 | 电子基板的制造方法、复合片以及电子基板 |
JP2020191437A (ja) * | 2019-05-22 | 2020-11-26 | レノボ・シンガポール・プライベート・リミテッド | インターポーザー、電子基板および電子基板の製造方法 |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060289203A1 (en) * | 2003-05-19 | 2006-12-28 | Dai Nippon Printing Co., Ltd. | Double-sided wiring board, double sided wiring board manufacturing method, and multilayer wiring board |
JP4211828B2 (ja) * | 2006-09-12 | 2009-01-21 | 株式会社日立製作所 | 実装構造体 |
JP5307471B2 (ja) * | 2008-08-11 | 2013-10-02 | ルネサスエレクトロニクス株式会社 | 基板の製造方法、基板、基板を備えた装置、判別方法、半導体装置の製造方法 |
JP5339968B2 (ja) * | 2009-03-04 | 2013-11-13 | パナソニック株式会社 | 実装構造体及びモータ |
WO2012026418A1 (ja) * | 2010-08-27 | 2012-03-01 | 株式会社村田製作所 | 半導体装置 |
KR20130089475A (ko) * | 2012-02-02 | 2013-08-12 | 삼성전자주식회사 | 회로 기판 및 이의 제조 방법과 이를 이용한 반도체 패키지 |
US9646942B2 (en) | 2012-02-23 | 2017-05-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms for controlling bump height variation |
US10433413B2 (en) * | 2014-08-15 | 2019-10-01 | Unimicron Technology Corp. | Manufacturing method of circuit structure embedded with heat-dissipation block |
JP2016213308A (ja) * | 2015-05-08 | 2016-12-15 | キヤノン株式会社 | プリント回路板及びプリント配線板 |
KR20170083823A (ko) * | 2016-01-11 | 2017-07-19 | 에스케이하이닉스 주식회사 | 측면 범프 결합 구조를 갖는 반도체 패키지 |
US10950573B2 (en) | 2019-03-19 | 2021-03-16 | International Business Machines Corporation | Lead-free column interconnect |
WO2021085180A1 (ja) * | 2019-10-30 | 2021-05-06 | 株式会社村田製作所 | 電子部品モジュール、および、電子部品モジュールの製造方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001185842A (ja) * | 1999-12-24 | 2001-07-06 | Sony Corp | 電子部品実装基板及び電子部品の実装方法 |
JP2001339006A (ja) * | 2000-05-30 | 2001-12-07 | Ibiden Co Ltd | 多層プリント配線板 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5655703A (en) * | 1995-05-25 | 1997-08-12 | International Business Machines Corporation | Solder hierarchy for chip attachment to substrates |
US6137164A (en) * | 1998-03-16 | 2000-10-24 | Texas Instruments Incorporated | Thin stacked integrated circuit device |
TW512653B (en) * | 1999-11-26 | 2002-12-01 | Ibiden Co Ltd | Multilayer circuit board and semiconductor device |
JP4105409B2 (ja) * | 2001-06-22 | 2008-06-25 | 株式会社ルネサステクノロジ | マルチチップモジュールの製造方法 |
EP1601017A4 (en) * | 2003-02-26 | 2009-04-29 | Ibiden Co Ltd | MULTILAYER PRINTED PCB |
US6910615B2 (en) * | 2003-03-27 | 2005-06-28 | International Business Machines Corporation | Solder reflow type electrical apparatus packaging having integrated circuit and discrete components |
JP4524454B2 (ja) * | 2004-11-19 | 2010-08-18 | ルネサスエレクトロニクス株式会社 | 電子装置およびその製造方法 |
-
2006
- 2006-03-23 JP JP2006081664A patent/JP5105042B2/ja active Active
-
2007
- 2007-02-01 EP EP07713764A patent/EP1998603A4/en not_active Withdrawn
- 2007-02-01 KR KR1020077028729A patent/KR100989298B1/ko active IP Right Grant
- 2007-02-01 CN CN200780000748XA patent/CN101331813B/zh active Active
- 2007-02-01 WO PCT/JP2007/051736 patent/WO2007108237A1/ja active Application Filing
- 2007-02-07 TW TW096104407A patent/TW200806134A/zh not_active IP Right Cessation
- 2007-03-22 US US11/689,858 patent/US7566835B2/en active Active
-
2009
- 2009-05-19 US US12/468,626 patent/US8122598B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001185842A (ja) * | 1999-12-24 | 2001-07-06 | Sony Corp | 電子部品実装基板及び電子部品の実装方法 |
JP2001339006A (ja) * | 2000-05-30 | 2001-12-07 | Ibiden Co Ltd | 多層プリント配線板 |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011249457A (ja) * | 2010-05-25 | 2011-12-08 | Dainippon Printing Co Ltd | 部品内蔵配線板、部品内蔵配線板の製造方法 |
US10660216B1 (en) | 2018-11-18 | 2020-05-19 | Lenovo (Singapore) Pte. Ltd. | Method of manufacturing electronic board and mounting sheet |
CN111200913A (zh) * | 2018-11-18 | 2020-05-26 | 联想(新加坡)私人有限公司 | 电子基板的制造方法及安装用片 |
CN111199921A (zh) * | 2018-11-18 | 2020-05-26 | 联想(新加坡)私人有限公司 | 电子基板的制造方法、复合片以及电子基板 |
CN111199921B (zh) * | 2018-11-18 | 2023-11-21 | 联想(新加坡)私人有限公司 | 电子基板的制造方法、复合片以及电子基板 |
CN111200913B (zh) * | 2018-11-18 | 2023-12-15 | 联想(新加坡)私人有限公司 | 电子基板的制造方法及安装用片 |
JP2020191437A (ja) * | 2019-05-22 | 2020-11-26 | レノボ・シンガポール・プライベート・リミテッド | インターポーザー、電子基板および電子基板の製造方法 |
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