JP2007233718A - 制御装置及び半導体集積回路 - Google Patents

制御装置及び半導体集積回路 Download PDF

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Publication number
JP2007233718A
JP2007233718A JP2006055017A JP2006055017A JP2007233718A JP 2007233718 A JP2007233718 A JP 2007233718A JP 2006055017 A JP2006055017 A JP 2006055017A JP 2006055017 A JP2006055017 A JP 2006055017A JP 2007233718 A JP2007233718 A JP 2007233718A
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JP
Japan
Prior art keywords
clock
supply
clock signal
lsi
fluctuation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2006055017A
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English (en)
Japanese (ja)
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JP2007233718A5 (enExample
Inventor
Hiroshi Shindo
泰士 新藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2006055017A priority Critical patent/JP2007233718A/ja
Priority to US11/677,827 priority patent/US8024595B2/en
Publication of JP2007233718A publication Critical patent/JP2007233718A/ja
Publication of JP2007233718A5 publication Critical patent/JP2007233718A5/ja
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2006055017A 2006-03-01 2006-03-01 制御装置及び半導体集積回路 Withdrawn JP2007233718A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2006055017A JP2007233718A (ja) 2006-03-01 2006-03-01 制御装置及び半導体集積回路
US11/677,827 US8024595B2 (en) 2006-03-01 2007-02-22 Semiconductor integrated circuit, and method of supplying a clock to internal blocks provided in a semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006055017A JP2007233718A (ja) 2006-03-01 2006-03-01 制御装置及び半導体集積回路

Publications (2)

Publication Number Publication Date
JP2007233718A true JP2007233718A (ja) 2007-09-13
JP2007233718A5 JP2007233718A5 (enExample) 2009-04-09

Family

ID=38472741

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006055017A Withdrawn JP2007233718A (ja) 2006-03-01 2006-03-01 制御装置及び半導体集積回路

Country Status (2)

Country Link
US (1) US8024595B2 (enExample)
JP (1) JP2007233718A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012221300A (ja) * 2011-04-11 2012-11-12 Sony Computer Entertainment Inc 半導体集積回路、その制御方法、及び電子機器
JP2023140990A (ja) * 2022-03-23 2023-10-05 株式会社エヌエスアイテクス ニューラルネットワーク演算装置

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8385040B1 (en) * 2011-08-16 2013-02-26 Der Sheng Co., Ltd. Conductive wheel with static dissipation function
US8751836B1 (en) * 2011-12-28 2014-06-10 Datadirect Networks, Inc. Data storage system and method for monitoring and controlling the power budget in a drive enclosure housing data storage devices
JP6103825B2 (ja) * 2012-06-07 2017-03-29 キヤノン株式会社 半導体集積回路、情報処理装置
JP7087509B2 (ja) * 2018-03-19 2022-06-21 富士フイルムビジネスイノベーション株式会社 情報処理装置及び回路装置
CN116774776B (zh) * 2023-08-16 2023-11-10 沐曦集成电路(上海)有限公司 芯片时钟控制系统

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5670899A (en) * 1994-11-21 1997-09-23 Yamaha Corporation Logic circuit controlled by a plurality of clock signals
US5983339A (en) * 1995-08-21 1999-11-09 International Business Machines Corporation Power down system and method for pipelined logic functions
JPH10268963A (ja) * 1997-03-28 1998-10-09 Mitsubishi Electric Corp 情報処理装置
CN100570577C (zh) * 2001-08-29 2009-12-16 联发科技股份有限公司 高速程序跟踪
US7346791B2 (en) * 2003-03-26 2008-03-18 Matsushita Electric Industrial Co., Ltd. Method for controlling a clock frequency of an information processor in accordance with the detection of a start and a end of a specific processing section
US8125261B2 (en) * 2003-07-22 2012-02-28 Nec Corporation Multi-power source semiconductor device
JP2005339310A (ja) * 2004-05-28 2005-12-08 Renesas Technology Corp 半導体装置
JP4296135B2 (ja) * 2004-07-23 2009-07-15 Ｏｋｉセミコンダクタ株式会社 Ｐｌｌクロック出力安定化回路
US7469353B2 (en) * 2005-09-30 2008-12-23 Intel Corporation Power sequencing

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012221300A (ja) * 2011-04-11 2012-11-12 Sony Computer Entertainment Inc 半導体集積回路、その制御方法、及び電子機器
JP2023140990A (ja) * 2022-03-23 2023-10-05 株式会社エヌエスアイテクス ニューラルネットワーク演算装置
JP7707977B2 (ja) 2022-03-23 2025-07-15 株式会社デンソー ニューラルネットワーク演算装置

Also Published As

Publication number Publication date
US8024595B2 (en) 2011-09-20
US20070208963A1 (en) 2007-09-06

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