JP2006269994A5 - - Google Patents

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Publication number
JP2006269994A5
JP2006269994A5 JP2005089977A JP2005089977A JP2006269994A5 JP 2006269994 A5 JP2006269994 A5 JP 2006269994A5 JP 2005089977 A JP2005089977 A JP 2005089977A JP 2005089977 A JP2005089977 A JP 2005089977A JP 2006269994 A5 JP2006269994 A5 JP 2006269994A5
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JP
Japan
Prior art keywords
adhesion layer
manufacturing
layer
wiring board
board according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2005089977A
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English (en)
Japanese (ja)
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JP2006269994A (ja
JP4621049B2 (ja
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Publication date
Application filed filed Critical
Priority to JP2005089977A priority Critical patent/JP4621049B2/ja
Priority claimed from JP2005089977A external-priority patent/JP4621049B2/ja
Priority to US11/169,007 priority patent/US7247524B2/en
Publication of JP2006269994A publication Critical patent/JP2006269994A/ja
Publication of JP2006269994A5 publication Critical patent/JP2006269994A5/ja
Application granted granted Critical
Publication of JP4621049B2 publication Critical patent/JP4621049B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2005089977A 2005-03-25 2005-03-25 配線基板の製造方法 Expired - Fee Related JP4621049B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2005089977A JP4621049B2 (ja) 2005-03-25 2005-03-25 配線基板の製造方法
US11/169,007 US7247524B2 (en) 2005-03-25 2005-06-29 Manufacturing method of wiring substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005089977A JP4621049B2 (ja) 2005-03-25 2005-03-25 配線基板の製造方法

Publications (3)

Publication Number Publication Date
JP2006269994A JP2006269994A (ja) 2006-10-05
JP2006269994A5 true JP2006269994A5 (enExample) 2007-02-22
JP4621049B2 JP4621049B2 (ja) 2011-01-26

Family

ID=37035732

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005089977A Expired - Fee Related JP4621049B2 (ja) 2005-03-25 2005-03-25 配線基板の製造方法

Country Status (2)

Country Link
US (1) US7247524B2 (enExample)
JP (1) JP4621049B2 (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7485962B2 (en) * 2002-12-10 2009-02-03 Fujitsu Limited Semiconductor device, wiring substrate forming method, and substrate processing apparatus
JP4343044B2 (ja) * 2004-06-30 2009-10-14 新光電気工業株式会社 インターポーザ及びその製造方法並びに半導体装置
JP4895594B2 (ja) * 2005-12-08 2012-03-14 株式会社ディスコ 基板の切削加工方法
US7545042B2 (en) 2005-12-22 2009-06-09 Princo Corp. Structure combining an IC integrated substrate and a carrier, and method of manufacturing such structure
JP2007194469A (ja) * 2006-01-20 2007-08-02 Renesas Technology Corp 半導体装置の製造方法
US7608538B2 (en) * 2007-01-05 2009-10-27 International Business Machines Corporation Formation of vertical devices by electroplating
JP4837696B2 (ja) * 2008-03-24 2011-12-14 新光電気工業株式会社 配線基板の製造方法及び半導体装置の製造方法
TWI419091B (zh) 2009-02-10 2013-12-11 Ind Tech Res Inst 可轉移的可撓式電子裝置結構及可撓式電子裝置的製造方法
CN101833215B (zh) * 2009-03-09 2013-07-10 财团法人工业技术研究院 可挠式电子装置的转移结构及可挠式电子装置的制造方法
US9355962B2 (en) * 2009-06-12 2016-05-31 Stats Chippac Ltd. Integrated circuit package stacking system with redistribution and method of manufacture thereof
DE102010016779A1 (de) * 2010-05-04 2011-11-10 Cicor Management AG Verfahren zur Herstellung einer flexiblen Schaltungsanordnung
JP5416724B2 (ja) * 2011-01-26 2014-02-12 積水化学工業株式会社 複合体、複合体の製造方法及び多層ビルドアップ配線基板の製造方法
TWI560835B (en) * 2011-11-07 2016-12-01 Siliconware Precision Industries Co Ltd Package substrate and fabrication method thereof
DE102012209328A1 (de) * 2012-06-01 2013-12-05 3D-Micromac Ag Verfahren und Anlage zum Herstellen eines Mehrschichtelements sowie Mehrschichtelement
JP6151724B2 (ja) * 2013-01-30 2017-06-21 京セラ株式会社 実装構造体の製造方法
TW201826463A (zh) * 2016-09-08 2018-07-16 日商凸版印刷股份有限公司 配線基板及配線基板的製造方法
JP7423907B2 (ja) * 2019-05-24 2024-01-30 Ｔｏｐｐａｎホールディングス株式会社 配線基板の製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4933743A (en) * 1989-03-11 1990-06-12 Fairchild Semiconductor Corporation High performance interconnect system for an integrated circuit
US6300242B1 (en) * 1999-04-28 2001-10-09 Matsuhita Electronics Corporation Semiconductor device and method of fabricating the same
US7064412B2 (en) * 2000-01-25 2006-06-20 3M Innovative Properties Company Electronic package with integrated capacitor
JP4640878B2 (ja) * 2000-06-21 2011-03-02 富士通株式会社 低誘電率樹脂絶縁層を用いた回路基板の製造方法及び低誘電率樹脂絶縁層を用いた薄膜多層回路フィルムの製造方法
JP3546961B2 (ja) * 2000-10-18 2004-07-28 日本電気株式会社 半導体装置搭載用配線基板およびその製造方法、並びに半導体パッケージ
JP2004087701A (ja) * 2002-08-26 2004-03-18 Nec Toppan Circuit Solutions Toyama Inc 多層配線構造の製造方法および半導体装置の搭載方法
JP3526854B1 (ja) * 2002-09-27 2004-05-17 沖電気工業株式会社 強誘電体メモリ装置
JP2005063988A (ja) * 2003-08-08 2005-03-10 Ngk Spark Plug Co Ltd 配線基板の製造方法
JP2005079108A (ja) * 2003-08-29 2005-03-24 Ngk Spark Plug Co Ltd 配線基板の製造方法
JP4580633B2 (ja) * 2003-11-14 2010-11-17 スタンレー電気株式会社 半導体装置及びその製造方法
JP4549694B2 (ja) * 2004-02-27 2010-09-22 日本特殊陶業株式会社 配線基板の製造方法及び多数個取り基板
JP4565861B2 (ja) * 2004-02-27 2010-10-20 日本特殊陶業株式会社 配線基板の製造方法

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