JP2006245167A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
JP2006245167A
JP2006245167A JP2005056971A JP2005056971A JP2006245167A JP 2006245167 A JP2006245167 A JP 2006245167A JP 2005056971 A JP2005056971 A JP 2005056971A JP 2005056971 A JP2005056971 A JP 2005056971A JP 2006245167 A JP2006245167 A JP 2006245167A
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JP
Japan
Prior art keywords
film
insulating film
mosfet
gate electrode
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2005056971A
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English (en)
Japanese (ja)
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JP2006245167A5 (enExample
Inventor
Kazunari Ishimaru
一成 石丸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2005056971A priority Critical patent/JP2006245167A/ja
Priority to US11/364,552 priority patent/US20060237788A1/en
Publication of JP2006245167A publication Critical patent/JP2006245167A/ja
Publication of JP2006245167A5 publication Critical patent/JP2006245167A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135—Manufacturing their gate conductors
    • H10D84/0137—Manufacturing their gate conductors the gate conductors being silicided
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135—Manufacturing their gate conductors
    • H10D84/014—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2005056971A 2005-03-02 2005-03-02 半導体装置及びその製造方法 Pending JP2006245167A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2005056971A JP2006245167A (ja) 2005-03-02 2005-03-02 半導体装置及びその製造方法
US11/364,552 US20060237788A1 (en) 2005-03-02 2006-03-01 Semiconductor device and its fabrication method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005056971A JP2006245167A (ja) 2005-03-02 2005-03-02 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JP2006245167A true JP2006245167A (ja) 2006-09-14
JP2006245167A5 JP2006245167A5 (enExample) 2008-03-06

Family

ID=37051293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005056971A Pending JP2006245167A (ja) 2005-03-02 2005-03-02 半導体装置及びその製造方法

Country Status (2)

Country Link
US (1) US20060237788A1 (enExample)
JP (1) JP2006245167A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008172237A (ja) * 2007-01-12 2008-07-24 Internatl Business Mach Corp <Ibm> Ｆｉｎｆｅｔデバイスのフィンの上に完全にシリサイド化されたデュアル・ゲートを形成する方法
JP2009117465A (ja) * 2007-11-02 2009-05-28 Panasonic Corp 半導体装置及びその製造方法
US9177807B2 (en) 2012-12-25 2015-11-03 Renesas Electronics Corporation Manufacturing method of semiconductor device

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7951678B2 (en) * 2008-08-12 2011-05-31 International Business Machines Corporation Metal-gate high-k reference structure
US9224607B2 (en) * 2013-09-18 2015-12-29 Globalfoundries Inc. Dual epitaxy region integration
CN105990421A (zh) * 2015-01-29 2016-10-05 无锡华润上华半导体有限公司 半导体器件及其制备方法
US10163900B2 (en) 2017-02-08 2018-12-25 Globalfoundries Inc. Integration of vertical field-effect transistors and saddle fin-type field effect transistors
US20180342507A1 (en) * 2017-05-25 2018-11-29 Globalfoundries Inc. Integration of vertical-transport transistors and high-voltage transistors
KR102342550B1 (ko) * 2017-06-09 2021-12-23 삼성전자주식회사 반도체 장치
US10777465B2 (en) 2018-01-11 2020-09-15 Globalfoundries Inc. Integration of vertical-transport transistors and planar transistors
US11404410B2 (en) * 2020-04-29 2022-08-02 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having different voltage regions

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125650A (ja) * 1983-01-07 1984-07-20 Toshiba Corp 半導体装置の製造方法
JPS6066854A (ja) * 1983-09-24 1985-04-17 Nippon Telegr & Teleph Corp <Ntt> 半導体装置およびその製造方法
JPH0817694A (ja) * 1994-06-27 1996-01-19 Motorola Inc 集積回路に適用するための薄膜およびバルク混合半導体基板ならびにその形成方法
JP2001060630A (ja) * 1999-08-23 2001-03-06 Nec Corp 半導体装置の製造方法
JP2002118263A (ja) * 2000-10-05 2002-04-19 Seiko Epson Corp 半導体装置の製造方法
JP2002217307A (ja) * 2001-01-19 2002-08-02 Nec Corp 半導体装置及びその製造方法
JP2004128316A (ja) * 2002-10-04 2004-04-22 Toshiba Corp 半導体装置とその製造方法
JP2005228868A (ja) * 2004-02-12 2005-08-25 Sony Corp 半導体装置およびその製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6706581B1 (en) * 2002-10-29 2004-03-16 Taiwan Semiconductor Manufacturing Company Dual gate dielectric scheme: SiON for high performance devices and high k for low power devices
TWI252539B (en) * 2004-03-12 2006-04-01 Toshiba Corp Semiconductor device and manufacturing method therefor
US6897095B1 (en) * 2004-05-12 2005-05-24 Freescale Semiconductor, Inc. Semiconductor process and integrated circuit having dual metal oxide gate dielectric with single metal gate electrode

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125650A (ja) * 1983-01-07 1984-07-20 Toshiba Corp 半導体装置の製造方法
JPS6066854A (ja) * 1983-09-24 1985-04-17 Nippon Telegr & Teleph Corp <Ntt> 半導体装置およびその製造方法
JPH0817694A (ja) * 1994-06-27 1996-01-19 Motorola Inc 集積回路に適用するための薄膜およびバルク混合半導体基板ならびにその形成方法
JP2001060630A (ja) * 1999-08-23 2001-03-06 Nec Corp 半導体装置の製造方法
JP2002118263A (ja) * 2000-10-05 2002-04-19 Seiko Epson Corp 半導体装置の製造方法
JP2002217307A (ja) * 2001-01-19 2002-08-02 Nec Corp 半導体装置及びその製造方法
JP2004128316A (ja) * 2002-10-04 2004-04-22 Toshiba Corp 半導体装置とその製造方法
JP2005228868A (ja) * 2004-02-12 2005-08-25 Sony Corp 半導体装置およびその製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008172237A (ja) * 2007-01-12 2008-07-24 Internatl Business Mach Corp <Ibm> Ｆｉｎｆｅｔデバイスのフィンの上に完全にシリサイド化されたデュアル・ゲートを形成する方法
JP2009117465A (ja) * 2007-11-02 2009-05-28 Panasonic Corp 半導体装置及びその製造方法
US9177807B2 (en) 2012-12-25 2015-11-03 Renesas Electronics Corporation Manufacturing method of semiconductor device

Also Published As

Publication number Publication date
US20060237788A1 (en) 2006-10-26

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