JP2006120718A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP2006120718A
JP2006120718A JP2004304584A JP2004304584A JP2006120718A JP 2006120718 A JP2006120718 A JP 2006120718A JP 2004304584 A JP2004304584 A JP 2004304584A JP 2004304584 A JP2004304584 A JP 2004304584A JP 2006120718 A JP2006120718 A JP 2006120718A
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JP
Japan
Prior art keywords
semiconductor device
stress
conductive layer
layer
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004304584A
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English (en)
Japanese (ja)
Inventor
Tomohiro Saito
藤 友 博 齋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2004304584A priority Critical patent/JP2006120718A/ja
Priority to US11/043,115 priority patent/US20060081942A1/en
Priority to TW094136596A priority patent/TW200633217A/zh
Publication of JP2006120718A publication Critical patent/JP2006120718A/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/794Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising conductive materials, e.g. silicided source, drain or gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • H10D84/0177Manufacturing their gate conductors the gate conductors having different materials or different implants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2004304584A 2004-10-19 2004-10-19 半導体装置およびその製造方法 Pending JP2006120718A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2004304584A JP2006120718A (ja) 2004-10-19 2004-10-19 半導体装置およびその製造方法
US11/043,115 US20060081942A1 (en) 2004-10-19 2005-01-27 Semiconductor device and manufacturing method therefor
TW094136596A TW200633217A (en) 2004-10-19 2005-10-19 Semiconductor device and manufacturing method therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004304584A JP2006120718A (ja) 2004-10-19 2004-10-19 半導体装置およびその製造方法

Publications (1)

Publication Number Publication Date
JP2006120718A true JP2006120718A (ja) 2006-05-11

Family

ID=36179854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004304584A Pending JP2006120718A (ja) 2004-10-19 2004-10-19 半導体装置およびその製造方法

Country Status (3)

Country Link
US (1) US20060081942A1 (enExample)
JP (1) JP2006120718A (enExample)
TW (1) TW200633217A (enExample)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008096587A1 (ja) * 2007-02-07 2008-08-14 Nec Corporation 半導体装置
JP2008277753A (ja) * 2007-04-06 2008-11-13 Panasonic Corp 半導体装置及びその製造方法
JPWO2008038346A1 (ja) * 2006-09-27 2010-01-28 富士通株式会社 半導体装置およびその製造方法
JP2010073985A (ja) * 2008-09-19 2010-04-02 Toshiba Corp 半導体装置
JP2010529654A (ja) * 2007-05-31 2010-08-26 フリースケール セミコンダクター インコーポレイテッド ゲート・ストレッサ及び半導体デバイスを特徴とする半導体デバイスの製造方法
WO2011010407A1 (ja) * 2009-07-23 2011-01-27 パナソニック株式会社 半導体装置及びその製造方法
JP2012038979A (ja) * 2010-08-09 2012-02-23 Sony Corp 半導体装置及びその製造方法

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070108529A1 (en) 2005-11-14 2007-05-17 Taiwan Semiconductor Manufacturing Company, Ltd. Strained gate electrodes in semiconductor devices
US8101485B2 (en) * 2005-12-16 2012-01-24 Intel Corporation Replacement gates to enhance transistor strain
EP2061076A1 (en) * 2007-11-13 2009-05-20 Interuniversitair Micro-Elektronica Centrum Vzw Dual work function device with stressor layer and method for manufacturing the same
US20110147804A1 (en) * 2009-12-23 2011-06-23 Rishabh Mehandru Drive current enhancement in tri-gate MOSFETS by introduction of compressive metal gate stress using ion implantation
US8461034B2 (en) * 2010-10-20 2013-06-11 International Business Machines Corporation Localized implant into active region for enhanced stress
CN103367155B (zh) * 2012-03-31 2016-02-17 中芯国际集成电路制造(上海)有限公司 Nmos晶体管及mos晶体管的形成方法
FR2995135B1 (fr) * 2012-09-05 2015-12-04 Commissariat Energie Atomique Procede de realisation de transistors fet
US9355888B2 (en) 2012-10-01 2016-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Implant isolated devices and method for forming the same
US9673245B2 (en) 2012-10-01 2017-06-06 Taiwan Semiconductor Manufacturing Company, Ltd. Implant isolated devices and method for forming the same

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09246394A (ja) * 1996-03-01 1997-09-19 Hitachi Ltd 半導体集積回路装置およびその製造方法
JPH09283637A (ja) * 1996-04-10 1997-10-31 Nec Corp 半導体装置の製造方法
JP2002093921A (ja) * 2000-09-11 2002-03-29 Hitachi Ltd 半導体装置の製造方法
JP2002329868A (ja) * 2001-04-27 2002-11-15 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2004111922A (ja) * 2002-07-31 2004-04-08 Texas Instruments Inc ゲート誘電体および方法
JP2004172389A (ja) * 2002-11-20 2004-06-17 Renesas Technology Corp 半導体装置およびその製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100265350B1 (ko) * 1998-06-30 2000-09-15 김영환 매립절연층을 갖는 실리콘 기판에서의 반도체소자 제조방법
US6221735B1 (en) * 2000-02-15 2001-04-24 Philips Semiconductors, Inc. Method for eliminating stress induced dislocations in CMOS devices
US6872613B1 (en) * 2003-09-04 2005-03-29 Advanced Micro Devices, Inc. Method for integrating metals having different work functions to form CMOS gates having a high-k gate dielectric and related structure
US7183182B2 (en) * 2003-09-24 2007-02-27 International Business Machines Corporation Method and apparatus for fabricating CMOS field effect transistors

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09246394A (ja) * 1996-03-01 1997-09-19 Hitachi Ltd 半導体集積回路装置およびその製造方法
JPH09283637A (ja) * 1996-04-10 1997-10-31 Nec Corp 半導体装置の製造方法
JP2002093921A (ja) * 2000-09-11 2002-03-29 Hitachi Ltd 半導体装置の製造方法
JP2002329868A (ja) * 2001-04-27 2002-11-15 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2004111922A (ja) * 2002-07-31 2004-04-08 Texas Instruments Inc ゲート誘電体および方法
JP2004172389A (ja) * 2002-11-20 2004-06-17 Renesas Technology Corp 半導体装置およびその製造方法

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2008038346A1 (ja) * 2006-09-27 2010-01-28 富士通株式会社 半導体装置およびその製造方法
JP5018780B2 (ja) * 2006-09-27 2012-09-05 富士通株式会社 半導体装置およびその製造方法
WO2008096587A1 (ja) * 2007-02-07 2008-08-14 Nec Corporation 半導体装置
JP2008277753A (ja) * 2007-04-06 2008-11-13 Panasonic Corp 半導体装置及びその製造方法
JP2010529654A (ja) * 2007-05-31 2010-08-26 フリースケール セミコンダクター インコーポレイテッド ゲート・ストレッサ及び半導体デバイスを特徴とする半導体デバイスの製造方法
US8587039B2 (en) 2007-05-31 2013-11-19 Freescale Semiconductor, Inc. Method of forming a semiconductor device featuring a gate stressor and semiconductor device
JP2010073985A (ja) * 2008-09-19 2010-04-02 Toshiba Corp 半導体装置
WO2011010407A1 (ja) * 2009-07-23 2011-01-27 パナソニック株式会社 半導体装置及びその製造方法
JP2012038979A (ja) * 2010-08-09 2012-02-23 Sony Corp 半導体装置及びその製造方法
US10868177B2 (en) 2010-08-09 2020-12-15 Sony Corporation Semiconductor device and manufacturing method thereof
US12087858B2 (en) 2010-08-09 2024-09-10 Sony Group Corporation Semiconductor device including stress application layer

Also Published As

Publication number Publication date
US20060081942A1 (en) 2006-04-20
TW200633217A (en) 2006-09-16
TWI375327B (enExample) 2012-10-21

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