TW200633217A - Semiconductor device and manufacturing method therefor - Google Patents

Semiconductor device and manufacturing method therefor

Info

Publication number
TW200633217A
TW200633217A TW094136596A TW94136596A TW200633217A TW 200633217 A TW200633217 A TW 200633217A TW 094136596 A TW094136596 A TW 094136596A TW 94136596 A TW94136596 A TW 94136596A TW 200633217 A TW200633217 A TW 200633217A
Authority
TW
Taiwan
Prior art keywords
semiconductor device
transistor
gate
manufacturing
gate electrode
Prior art date
Application number
TW094136596A
Other languages
English (en)
Chinese (zh)
Other versions
TWI375327B (enExample
Inventor
Tomohiro Saito
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of TW200633217A publication Critical patent/TW200633217A/zh
Application granted granted Critical
Publication of TWI375327B publication Critical patent/TWI375327B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/794Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising conductive materials, e.g. silicided source, drain or gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • H10D84/0177Manufacturing their gate conductors the gate conductors having different materials or different implants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
TW094136596A 2004-10-19 2005-10-19 Semiconductor device and manufacturing method therefor TW200633217A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004304584A JP2006120718A (ja) 2004-10-19 2004-10-19 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
TW200633217A true TW200633217A (en) 2006-09-16
TWI375327B TWI375327B (enExample) 2012-10-21

Family

ID=36179854

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094136596A TW200633217A (en) 2004-10-19 2005-10-19 Semiconductor device and manufacturing method therefor

Country Status (3)

Country Link
US (1) US20060081942A1 (enExample)
JP (1) JP2006120718A (enExample)
TW (1) TW200633217A (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070108529A1 (en) * 2005-11-14 2007-05-17 Taiwan Semiconductor Manufacturing Company, Ltd. Strained gate electrodes in semiconductor devices
US8101485B2 (en) * 2005-12-16 2012-01-24 Intel Corporation Replacement gates to enhance transistor strain
WO2008038346A1 (en) * 2006-09-27 2008-04-03 Fujitsu Limited Semiconductor device and its manufacturing method
WO2008096587A1 (ja) * 2007-02-07 2008-08-14 Nec Corporation 半導体装置
JP5222583B2 (ja) * 2007-04-06 2013-06-26 パナソニック株式会社 半導体装置
US7960243B2 (en) 2007-05-31 2011-06-14 Freescale Semiconductor, Inc. Method of forming a semiconductor device featuring a gate stressor and semiconductor device
EP2061076A1 (en) * 2007-11-13 2009-05-20 Interuniversitair Micro-Elektronica Centrum Vzw Dual work function device with stressor layer and method for manufacturing the same
JP2010073985A (ja) * 2008-09-19 2010-04-02 Toshiba Corp 半導体装置
JP2011029303A (ja) * 2009-07-23 2011-02-10 Panasonic Corp 半導体装置及びその製造方法
US20110147804A1 (en) * 2009-12-23 2011-06-23 Rishabh Mehandru Drive current enhancement in tri-gate MOSFETS by introduction of compressive metal gate stress using ion implantation
JP5569243B2 (ja) 2010-08-09 2014-08-13 ソニー株式会社 半導体装置及びその製造方法
US8461034B2 (en) * 2010-10-20 2013-06-11 International Business Machines Corporation Localized implant into active region for enhanced stress
CN103367155B (zh) * 2012-03-31 2016-02-17 中芯国际集成电路制造(上海)有限公司 Nmos晶体管及mos晶体管的形成方法
FR2995135B1 (fr) * 2012-09-05 2015-12-04 Commissariat Energie Atomique Procede de realisation de transistors fet
US9673245B2 (en) 2012-10-01 2017-06-06 Taiwan Semiconductor Manufacturing Company, Ltd. Implant isolated devices and method for forming the same
US9355888B2 (en) 2012-10-01 2016-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Implant isolated devices and method for forming the same

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09246394A (ja) * 1996-03-01 1997-09-19 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP2910836B2 (ja) * 1996-04-10 1999-06-23 日本電気株式会社 半導体装置の製造方法
KR100265350B1 (ko) * 1998-06-30 2000-09-15 김영환 매립절연층을 갖는 실리콘 기판에서의 반도체소자 제조방법
US6221735B1 (en) * 2000-02-15 2001-04-24 Philips Semiconductors, Inc. Method for eliminating stress induced dislocations in CMOS devices
JP2002093921A (ja) * 2000-09-11 2002-03-29 Hitachi Ltd 半導体装置の製造方法
JP4831885B2 (ja) * 2001-04-27 2011-12-07 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6919251B2 (en) * 2002-07-31 2005-07-19 Texas Instruments Incorporated Gate dielectric and method
JP2004172389A (ja) * 2002-11-20 2004-06-17 Renesas Technology Corp 半導体装置およびその製造方法
US6872613B1 (en) * 2003-09-04 2005-03-29 Advanced Micro Devices, Inc. Method for integrating metals having different work functions to form CMOS gates having a high-k gate dielectric and related structure
US7183182B2 (en) * 2003-09-24 2007-02-27 International Business Machines Corporation Method and apparatus for fabricating CMOS field effect transistors

Also Published As

Publication number Publication date
US20060081942A1 (en) 2006-04-20
TWI375327B (enExample) 2012-10-21
JP2006120718A (ja) 2006-05-11

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees