JP2006013017A - 絶縁ゲート型半導体装置の製造方法 - Google Patents
絶縁ゲート型半導体装置の製造方法 Download PDFInfo
- Publication number
- JP2006013017A JP2006013017A JP2004185773A JP2004185773A JP2006013017A JP 2006013017 A JP2006013017 A JP 2006013017A JP 2004185773 A JP2004185773 A JP 2004185773A JP 2004185773 A JP2004185773 A JP 2004185773A JP 2006013017 A JP2006013017 A JP 2006013017A
- Authority
- JP
- Japan
- Prior art keywords
- trench
- insulating layer
- oxide film
- semiconductor device
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 74
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 35
- 238000000034 method Methods 0.000 claims abstract description 67
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 238000000137 annealing Methods 0.000 claims abstract description 25
- 230000001590 oxidative effect Effects 0.000 claims abstract description 12
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims description 38
- 239000012212 insulator Substances 0.000 claims description 24
- 238000000151 deposition Methods 0.000 claims description 23
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 19
- 229910000077 silane Inorganic materials 0.000 claims description 19
- 230000008021 deposition Effects 0.000 claims description 12
- 239000002994 raw material Substances 0.000 claims description 7
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 239000011810 insulating material Substances 0.000 claims 1
- 239000012535 impurity Substances 0.000 abstract description 26
- 239000000463 material Substances 0.000 abstract description 21
- 239000011800 void material Substances 0.000 abstract description 14
- 230000015556 catabolic process Effects 0.000 abstract description 5
- 238000009413 insulation Methods 0.000 abstract description 5
- 230000000694 effects Effects 0.000 abstract description 3
- 238000006731 degradation reaction Methods 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 description 18
- 238000007254 oxidation reaction Methods 0.000 description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 15
- 230000015572 biosynthetic process Effects 0.000 description 15
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 14
- 210000000746 body region Anatomy 0.000 description 14
- 229910052799 carbon Inorganic materials 0.000 description 14
- 239000007789 gas Substances 0.000 description 14
- 229910052710 silicon Inorganic materials 0.000 description 14
- 239000010703 silicon Substances 0.000 description 14
- 238000005530 etching Methods 0.000 description 8
- 238000005468 ion implantation Methods 0.000 description 8
- 230000005684 electric field Effects 0.000 description 7
- 230000006866 deterioration Effects 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 6
- 238000001312 dry etching Methods 0.000 description 6
- 238000002513 implantation Methods 0.000 description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 239000012495 reaction gas Substances 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 230000001629 suppression Effects 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 239000004215 Carbon black (E152) Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000008186 active pharmaceutical agent Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229930195733 hydrocarbon Natural products 0.000 description 2
- 150000002430 hydrocarbons Chemical class 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 238000002485 combustion reaction Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 150000002894 organic compounds Chemical class 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Formation Of Insulating Films (AREA)
Abstract
【解決手段】本発明の半導体装置の製造方法では,ゲートトレンチ21および終端トレンチ61を形成した後,各トレンチに対して不純物がドープされていない,いわゆるノンドープの絶縁膜の埋め込みを行う。その後,絶縁膜が形成された半導体基板に対し,酸化性雰囲気にてアニール処理を行う。これにより,ゲートトレンチ21の壁面沿いに熱酸化膜83が形成され,堆積絶縁層23中のボイドが消滅する。その後,堆積絶縁層23の一部をエッチバックし,エッチバックにて設けられたスペースにゲート材を充填する。
【選択図】 図1
Description
12 N- ドリフト領域
21 トレンチ(トレンチ部)
22 ゲート電極(電極層)
23 堆積絶縁層(堆積絶縁層)
24 ゲート絶縁膜(絶縁膜)
31 N+ ソース領域
41 P- ボディ領域
51 Pフローティング領域
81 くさび状の溝
82 ボイド
83 熱酸化膜
100 絶縁ゲート型半導体装置
Claims (3)
- トレンチ型電極構造を有する絶縁ゲート型半導体装置の製造方法において,
半導体基板の上面からトレンチ部を形成するトレンチ部形成工程と,
前記トレンチ部形成工程にてトレンチ部を形成した後に,そのトレンチ部内にノンドープの絶縁物の堆積による堆積絶縁層を形成する絶縁物堆積工程と,
前記絶縁物堆積工程にて堆積絶縁層を形成した後に,酸化性雰囲気にてアニール処理を行うアニール工程と,
前記アニール工程にてアニール処理を行った後に,堆積絶縁層の一部を除去するエッチバック工程と,
前記エッチバック工程にて堆積絶縁層の一部を除去した後に,トレンチ部の壁面に絶縁膜を形成する絶縁膜形成工程と,
前記絶縁膜形成工程にて絶縁膜を形成した後に,堆積絶縁層の上面上に電極層を形成する電極層形成工程と含むことを特徴とする絶縁ゲート型半導体装置の製造方法。 - 請求項1に記載する絶縁ゲート型半導体装置の製造方法において,
前記絶縁物堆積工程では,シランガスを主原料とし,CVD法によって堆積絶縁層を形成することを特徴とする絶縁ゲート型半導体装置の製造方法。 - 請求項1に記載する絶縁ゲート型半導体装置の製造方法において,
前記絶縁物堆積工程では,TEOS(テトラエチルオルソシリケート)を主原料とし,CVD法によって堆積絶縁層を形成することを特徴とする絶縁ゲート型半導体装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004185773A JP4500598B2 (ja) | 2004-06-24 | 2004-06-24 | 絶縁ゲート型半導体装置の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004185773A JP4500598B2 (ja) | 2004-06-24 | 2004-06-24 | 絶縁ゲート型半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006013017A true JP2006013017A (ja) | 2006-01-12 |
JP4500598B2 JP4500598B2 (ja) | 2010-07-14 |
Family
ID=35779907
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004185773A Expired - Fee Related JP4500598B2 (ja) | 2004-06-24 | 2004-06-24 | 絶縁ゲート型半導体装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4500598B2 (ja) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008091699A (ja) | 2006-10-03 | 2008-04-17 | Furukawa Electric Co Ltd:The | 半導体トランジスタの製造方法 |
JP2008270365A (ja) * | 2007-04-17 | 2008-11-06 | Toyota Motor Corp | 半導体装置とその製造方法 |
KR100914285B1 (ko) | 2006-12-29 | 2009-08-27 | 주식회사 하이닉스반도체 | 벌브 타입의 리세스 채널을 갖는 반도체 소자의 제조방법 |
WO2010044430A1 (ja) * | 2008-10-16 | 2010-04-22 | 住友電工デバイス・イノベーション株式会社 | 半導体装置 |
US7723191B2 (en) | 2006-12-14 | 2010-05-25 | Samsung Electronics Co., Ltd. | Method of manufacturing semiconductor device having buried gate |
JP2015126027A (ja) * | 2013-12-25 | 2015-07-06 | トヨタ自動車株式会社 | 半導体装置及び半導体装置の製造方法 |
JP2019186458A (ja) * | 2018-04-13 | 2019-10-24 | トヨタ自動車株式会社 | スイッチング素子とその製造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05335582A (ja) * | 1992-05-27 | 1993-12-17 | Omron Corp | 縦型mosfet装置およびその製造方法 |
JP2003069010A (ja) * | 2001-08-24 | 2003-03-07 | Sharp Corp | 半導体装置およびその製造方法 |
JP2005510087A (ja) * | 2001-11-15 | 2005-04-14 | ゼネラル セミコンダクター,インク. | ゲート電荷が低いトレンチ金属酸化膜半導体電界効果トランジスタ |
-
2004
- 2004-06-24 JP JP2004185773A patent/JP4500598B2/ja not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05335582A (ja) * | 1992-05-27 | 1993-12-17 | Omron Corp | 縦型mosfet装置およびその製造方法 |
JP2003069010A (ja) * | 2001-08-24 | 2003-03-07 | Sharp Corp | 半導体装置およびその製造方法 |
JP2005510087A (ja) * | 2001-11-15 | 2005-04-14 | ゼネラル セミコンダクター,インク. | ゲート電荷が低いトレンチ金属酸化膜半導体電界効果トランジスタ |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008091699A (ja) | 2006-10-03 | 2008-04-17 | Furukawa Electric Co Ltd:The | 半導体トランジスタの製造方法 |
US7723191B2 (en) | 2006-12-14 | 2010-05-25 | Samsung Electronics Co., Ltd. | Method of manufacturing semiconductor device having buried gate |
KR100914285B1 (ko) | 2006-12-29 | 2009-08-27 | 주식회사 하이닉스반도체 | 벌브 타입의 리세스 채널을 갖는 반도체 소자의 제조방법 |
JP2008270365A (ja) * | 2007-04-17 | 2008-11-06 | Toyota Motor Corp | 半導体装置とその製造方法 |
WO2010044430A1 (ja) * | 2008-10-16 | 2010-04-22 | 住友電工デバイス・イノベーション株式会社 | 半導体装置 |
JP2010098141A (ja) * | 2008-10-16 | 2010-04-30 | Sumitomo Electric Device Innovations Inc | 半導体装置の製造方法 |
JP2015126027A (ja) * | 2013-12-25 | 2015-07-06 | トヨタ自動車株式会社 | 半導体装置及び半導体装置の製造方法 |
JP2019186458A (ja) * | 2018-04-13 | 2019-10-24 | トヨタ自動車株式会社 | スイッチング素子とその製造方法 |
JP7073872B2 (ja) | 2018-04-13 | 2022-05-24 | 株式会社デンソー | スイッチング素子とその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JP4500598B2 (ja) | 2010-07-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8253204B2 (en) | Semiconductor device with strained channel and method of fabricating the same | |
TWI580052B (zh) | 具有豎直電荷補償結構和次級表面連接層的半導體裝置以及方法 | |
US7374986B2 (en) | Method of fabricating field effect transistor (FET) having wire channels | |
US9818845B2 (en) | MOS-driven semiconductor device and method for manufacturing MOS-driven semiconductor device | |
US8106436B2 (en) | Semiconductor trench structure having a sealing plug | |
US7274051B2 (en) | Field effect transistor (FET) having wire channels and method of fabricating the same | |
JP4068597B2 (ja) | 半導体装置 | |
CN1279509A (zh) | 改进动态随机存取存储器工艺的氮化物衬里隔离轴环 | |
JP4735414B2 (ja) | 絶縁ゲート型半導体装置 | |
JP4500558B2 (ja) | 絶縁ゲート型半導体装置の製造方法 | |
US7391077B2 (en) | Vertical type semiconductor device | |
JP4500598B2 (ja) | 絶縁ゲート型半導体装置の製造方法 | |
JP4595345B2 (ja) | 半導体装置の製造方法 | |
KR100634260B1 (ko) | 박막 형성 방법 및 이를 이용하는 반도체 소자 형성 방법 | |
JP4447377B2 (ja) | 絶縁ゲート型半導体装置およびその製造方法 | |
JP4622905B2 (ja) | 絶縁ゲート型半導体装置の製造方法 | |
JP2005252204A (ja) | 絶縁ゲート型半導体装置およびその製造方法 | |
TWI460823B (zh) | 製造溝槽式金屬氧化物半導體場效電晶體的方法 | |
JP2005252203A (ja) | 絶縁ゲート型半導体装置およびその製造方法 | |
CN113270320B (zh) | 一种半导体元件的制备方法及半导体元件 | |
KR101592505B1 (ko) | 반도체 메모리 소자 및 이의 제조 방법 | |
JP2003209252A (ja) | 高耐圧縦型mosトランジスタとその製造方法 | |
KR100833594B1 (ko) | 모스펫 소자 및 그 제조방법 | |
CN113745313A (zh) | 电流泄露减少的功率mosfet以及制造功率mosfet的方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20061026 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20091112 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20091117 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20091223 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20100413 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20100419 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130423 Year of fee payment: 3 |
|
R151 | Written notification of patent or utility model registration |
Ref document number: 4500598 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130423 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140423 Year of fee payment: 4 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |