JP4447377B2 - 絶縁ゲート型半導体装置およびその製造方法 - Google Patents
絶縁ゲート型半導体装置およびその製造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims description 23
- 238000000034 method Methods 0.000 claims description 51
- 238000000137 annealing Methods 0.000 claims description 28
- 210000000746 body region Anatomy 0.000 claims description 27
- 239000000758 substrate Substances 0.000 claims description 27
- 239000012535 impurity Substances 0.000 claims description 25
- 239000012212 insulator Substances 0.000 claims description 21
- 238000001039 wet etching Methods 0.000 claims description 21
- 238000000151 deposition Methods 0.000 claims description 19
- 239000007789 gas Substances 0.000 claims description 16
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- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 238000002513 implantation Methods 0.000 claims description 6
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 4
- 239000001257 hydrogen Substances 0.000 claims description 4
- 229910052739 hydrogen Inorganic materials 0.000 claims description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 88
- 230000003647 oxidation Effects 0.000 description 21
- 238000007254 oxidation reaction Methods 0.000 description 21
- 238000001312 dry etching Methods 0.000 description 15
- 238000005530 etching Methods 0.000 description 10
- 239000000463 material Substances 0.000 description 10
- 238000005468 ion implantation Methods 0.000 description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 230000015556 catabolic process Effects 0.000 description 8
- 230000005684 electric field Effects 0.000 description 8
- 229910052814 silicon oxide Inorganic materials 0.000 description 8
- 239000000126 substance Substances 0.000 description 7
- 239000002344 surface layer Substances 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 230000006866 deterioration Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000008186 active pharmaceutical agent Substances 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
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- 230000000149 penetrating effect Effects 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 238000002485 combustion reaction Methods 0.000 description 1
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- 238000007796 conventional method Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
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- 238000007429 general method Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
- H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
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- Microelectronics & Electronic Packaging (AREA)
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- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Description
12 N- ドリフト領域
21 トレンチ(トレンチ部)
22 ゲート電極(電極層)
23 堆積絶縁層(堆積絶縁層)
24 ゲート絶縁膜(絶縁膜)
31 N+ ソース領域
41 P- ボディ領域
51 Pフローティング領域
81 くさび状の溝
82 ボイド
83 熱酸化膜
100 絶縁ゲート型半導体装置
Claims (3)
- トレンチ型電極構造を有する絶縁ゲート型半導体装置の製造方法において,
半導体基板の上面からトレンチ部を形成するトレンチ部形成工程と,
前記トレンチ部形成工程にてトレンチ部を形成した後に,そのトレンチ部の底部から不純物を注入する不純物注入工程と,
前記不純物注入工程にて不純物を注入した後に,そのトレンチ部内に絶縁物の堆積による堆積絶縁層を形成する絶縁物堆積工程と,
前記絶縁物堆積工程にて堆積絶縁層を形成した後に,堆積絶縁層の一部を除去するエッチバック工程と,
前記エッチバック工程にて堆積絶縁層の一部を除去した後に,水素と酸素との混合気体の酸化性雰囲気中,900℃から1000℃の範囲内の温度にてアニール処理を行うアニール工程と,
前記アニール工程にてアニール処理を行った後に,ウェットエッチングにて表面の酸化膜層を除去するウェットエッチング工程と,
前記ウェットエッチング工程にて酸化膜を除去した後に,トレンチ部の壁面に沿って絶縁膜を形成する絶縁膜形成工程と,
前記絶縁膜形成工程にて絶縁膜を形成した後に,堆積絶縁層の上面上に電極層を形成する電極層形成工程と含むことを特徴とする絶縁ゲート型半導体装置の製造方法。 - 請求項1に記載する絶縁ゲート型半導体装置の製造方法において,
前記トレンチ部形成工程では,テーパの角度が85度から89度までの範囲内であるテーパ形状のトレンチ部を形成することを特徴とする絶縁ゲート型半導体装置の製造方法。 - 半導体基板内の上面側に位置し第1導電型半導体であるボディ領域と,前記ボディ領域の下面と接し第2導電型半導体であるドリフト領域と,半導体基板の上面から前記ボディ領域を貫通しその底部が前記ボディ領域の下面より下方に位置するトレンチ部と,前記ドリフト領域に囲まれるとともに前記トレンチ部の底部を包含し,第1導電型半導体であるフローティング領域とを有する絶縁ゲート型半導体装置において,
前記トレンチ部は,テーパ形状であって,そのテーパの角度が85度から89度までの範囲内であり,
前記トレンチ部内には,
絶縁物を堆積してなる堆積絶縁層と,
前記堆積絶縁層上に位置し,前記ボディ領域と対面する電極層と,
前記電極層と前記ボディ領域とを隔離する絶縁膜とが形成されており,
前記トレンチ部の壁面は,半導体基板の厚さ方向の,前記堆積絶縁層と前記電極層との界面の位置にて段状をなしていることを特徴とする絶縁ゲート型半導体装置。
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JP2004158575A JP4447377B2 (ja) | 2004-05-28 | 2004-05-28 | 絶縁ゲート型半導体装置およびその製造方法 |
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JP4447377B2 true JP4447377B2 (ja) | 2010-04-07 |
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Families Citing this family (7)
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JP4450241B2 (ja) | 2007-03-20 | 2010-04-14 | 株式会社デンソー | 炭化珪素半導体装置の製造方法 |
JP2008270365A (ja) * | 2007-04-17 | 2008-11-06 | Toyota Motor Corp | 半導体装置とその製造方法 |
WO2009067364A1 (en) | 2007-11-20 | 2009-05-28 | S.O.I.Tec Silicon On Insulator Technologies | Transfer of high temperature wafers |
JP5353174B2 (ja) * | 2008-10-08 | 2013-11-27 | トヨタ自動車株式会社 | 半導体装置の製造方法 |
JP5483693B2 (ja) * | 2009-12-17 | 2014-05-07 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
US9640655B2 (en) | 2013-01-24 | 2017-05-02 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device and manufacturing method of semiconductor device |
JP2020047729A (ja) * | 2018-09-18 | 2020-03-26 | トヨタ自動車株式会社 | 半導体装置の製造方法 |
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