JP2005515615A - ダイ上のボンディングパッドの拡張による超小型電子デバイスの実装方法 - Google Patents
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Abstract
Description
Claims (27)
- 超小型電子デバイスの作製方法であって、
複数の独立した回路を支持し、上側表面上に複数のボンディングパッドを有する半導体ウェハを用意し、
半導体の上側表面上にパッシベーション層を適用し、
パッシベーション層に開口を形成して半導体ウェハの上側表面上のボンディングパッドの一部を露出させ、
パッシベーション層の選択した開口の上に拡張ボンディングパッドを形成し、
拡張ボンディングパッドを形成した後に半導体ウェハを第1のダイを含む複数の個々の超小型電子ダイに切断し、
第1のダイをパッケージコア内に固定してダイ/コアアセンブリを形成し、
ダイ/コアアセンブリの上に少なくとも1つのメタライゼーション層を積み上げるステップより成る超小型電子デバイスの方法。 - 拡張ボンディングパッドの形成ステップは、開口を形成した後に半導体ウェハ上に接着層を堆積させてパッシベーション層に対する拡張ボンディングパッドの接着性を増加させるステップを含む請求項1の方法。
- 拡張ボンディングパッドの形成ステップは、接着層を堆積させた後に半導体ウェハ上にシード層を堆積して拡張ボンディングパッドの堆積を容易にするステップを含む請求項2の方法。
- 拡張ボンディングパッドの形成ステップは、選択した開口の上方にボンディングパッドをパターンめっきするステップを含む請求項1の方法。
- 拡張ボンディングパッドの形成ステップは、半導体ウェハの多数の個々の回路のメタライゼーション層を単一のマスクによりパターン形成するステップを含む請求項1の方法。
- 拡張ボンディングパッドの形成ステップは、半導体ウェハの上側表面上の多数のボンディングパッドへパッシベーション層の対応する開口を介して導電結合される第1の拡張ボンディングパッドを形成するステップを含む請求項1の方法。
- 拡張ボンディングパッドの形成ステップは、鉛を使用しないコントロールド・コラプス・チップ・コネクト(C4)堆積プロセスを用いて半導体ウェハ上に拡張ボンディングパッドを構成するステップを含む請求項1の方法。
- 拡張ボンディングパッドは主として銅より成る請求項1の方法。
- 各拡張ボンディングパッドのパッシベーション層の平面における少なくとも1つの寸法は、半導体ウェハの上側表面上の関連のボンディングパッドの開口の対応する寸法より大きい請求項1の方法。
- 各拡張ボンディングパッドのパッシベーション層の平面内の2つの直交方向における寸法は、半導体ウェハの上側表面上の関連のボンディングパッドの開口の対応する寸法より大きい請求項9の方法。
- 第1のダイをパッケージコア内に固定するステップは、ダイをパッケージコアの開口内に保持し、開口内に気密封止材料を導入し、気密封止材料を硬化させるステップを含む請求項1の方法。
- ダイ/コアアセンブリ上に少なくとも1つのメタライゼーション層を積み上げるステップは、ダイ/コアアセンブリ上に誘電体層を堆積させ、誘電体層にビアホールを形成して拡張ボンディングパッドの一部を露出させ、誘電体層上にビアホールを介して拡張ボンディングパッドの露出部分と接触する第1のメタライゼーション層を堆積させるステップを含む請求項1の方法。
- パッシベーション層の上に位置する第1の拡張ボンディングパッドがそれぞれ少なくとも1つの関連のボンディングパッドにパッシベーション層の1またはそれ以上の対応する開口を介して導電結合された第1の超小型電子ダイを用意し、
パッシベーション層の上に位置する第2の拡張ボンディングパッドがそれぞれ少なくとも1つの関連のボンディングパッドにパッシベーション層の1またはそれ以上の対応する開口を介して導電結合された第2の超小型電子ダイを用意し、
第1の超小型電子ダイ及び第2の超小型電子ダイをパッケージコア内に固定してダイ/コアアセンブリを形成し、
ダイ/コアアセンブリ上に誘電体層を堆積させ、
誘電体層にビアホールを形成して第1及び第2の拡張ボンディングパッドの一部を露出させ、
ビアホールを介して第1及び第2の拡張ボンディングパッドの露出部分と接触するメタライゼーション層を誘電体層上に堆積させるステップより成る超小型電子デバイスの作製方法。 - 第1の超小型電子ダイを用意するステップは、
複数の独立した回路を支持し、上側表面上に複数のボンディングパッドを有する半導体ウェハを用意し、
半導体の上側表面上にパッシベーション層を適用し、
パッシベーション層に開口を形成して半導体ウェハの上側表面上のボンディングパッドの一部を露出させ、
パッシベーション層の選択した開口の上に拡張ボンディングパッドを形成し、
拡張ボンディングパッドを形成した後に半導体ウェハを第1のダイを含む複数の個々の超小型電子ダイに切断するステップを含む請求項13の方法。 - パッケージコア内に第1及び第2の超小型電子ダイを固定するステップは、第1及び第2の超小型電子ダイをパッケージコアの共通の開口内に固定するステップを含む請求項13の方法。
- 第1及び第2の超小型電子ダイをパッケージコア内に固定するステップは、第1の超小型電子ダイをパッケージコアの第1の開口内に固定し、第2の超小型電子ダイをパッケージコアの第2の開口内に固定するステップを含む請求項13の方法。
- 第1及び第2の超小型電子ダイをパッケージコア内に固定するステップは、第1及び第2の超小型電子ダイを気密封止材料を用いてパッケージコア内に固定するステップを含む請求項13の方法。
- メタライゼーション層を堆積させるステップは、単一のマスクを用いて誘電体層上にメタライゼーション層をパターン形成するステップを含む請求項13の方法。
- メタライゼーション層を堆積させるステップは、第1の超小型電子ダイの上の第1の拡張ボンディングパッドと第2の超小型電子ダイの上の第2の拡張ボンディングパッドとを導電接続する第1の導電要素を誘電体層上に形成するステップを含む請求項13の方法。
- メタライゼーション層を堆積させた後に、パッケージコアを多数の部分に分割して、1つが第1の超小型電子ダイを含み、別のものが第2の超小型電子ダイを含む多数の個々の超小型電子デバイスを形成するステップをさらに含む請求項13の方法。
- 複数の独立した回路を支持し、上側表面上に複数のボンディングパッドを有する半導体ウェハを用意し、
半導体の上側表面上にパッシベーション層を適用し、
パッシベーション層に開口を形成して半導体ウェハの上側表面上のボンディングパッドの一部を露出させ、
パッシベーション層上に導電性接着層を堆積させ、
半導体ウェハ上の接着層の上にマスキング層を形成し、
半導体ウェハのマスキング層により画定される領域にめっきを施してパッシベーション層の選択した開口上に拡張ボンディングパッドを形成し、
半導体ウェハを複数の個々の回路ダイに切断するステップより成る超小型電子デバイスの作製方法。 - 複数の個々のダイのうちの1つのダイをパッケージコア内に固定してダイ/コアアセンブリを形成し、
ダイ/コアアセンブリの上に少なくとも1つのメタライゼーション層を積み上げるステップより成る請求項21の方法。 - マスクを形成する前に導電性接着層の上に導電性シード層を堆積させるステップをさらに含む請求項21の方法。
- 導電性シード層を堆積させるステップは、導電性接着層の上に銅の層を堆積させるステップを含む請求項23の方法。
- 導電性接着層を堆積させるステップは、パッシベーション層の上にチタン、クロム、タングステン、タンタル及び窒化タンタルのうちの少なくとも1つをスパッタリングにより堆積させるステップを含む請求項21の方法。
- 半導体ウェハをめっきするステップは、半導体ウェハに銅の電気めっきを行うステップを含む請求項21の方法。
- 半導体ウェハをめっきするステップは、鉛を使用しないコントロールド・コラプス・チップ・コネクト(C4)堆積プロセスを使用するステップを含む請求項21の方法。
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US09/861,689 US7071024B2 (en) | 2001-05-21 | 2001-05-21 | Method for packaging a microelectronic device using on-die bond pad expansion |
PCT/US2002/015802 WO2002095822A2 (en) | 2001-05-21 | 2002-05-16 | Method for packaging a microelectronic device using on-die bond pad expansion |
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JP2005515615A true JP2005515615A (ja) | 2005-05-26 |
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JP2002592188A Pending JP2005515615A (ja) | 2001-05-21 | 2002-05-16 | ダイ上のボンディングパッドの拡張による超小型電子デバイスの実装方法 |
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US (1) | US7071024B2 (ja) |
JP (1) | JP2005515615A (ja) |
KR (1) | KR20040072025A (ja) |
CN (1) | CN1555574A (ja) |
AU (1) | AU2002303797A1 (ja) |
MY (1) | MY133585A (ja) |
WO (1) | WO2002095822A2 (ja) |
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-
2002
- 2002-05-16 KR KR10-2003-7015113A patent/KR20040072025A/ko not_active Application Discontinuation
- 2002-05-16 WO PCT/US2002/015802 patent/WO2002095822A2/en active Application Filing
- 2002-05-16 CN CNA028102967A patent/CN1555574A/zh active Pending
- 2002-05-16 AU AU2002303797A patent/AU2002303797A1/en not_active Abandoned
- 2002-05-16 JP JP2002592188A patent/JP2005515615A/ja active Pending
- 2002-05-20 MY MYPI20021845A patent/MY133585A/en unknown
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US20020173133A1 (en) | 2002-11-21 |
US7071024B2 (en) | 2006-07-04 |
MY133585A (en) | 2007-11-30 |
WO2002095822A2 (en) | 2002-11-28 |
CN1555574A (zh) | 2004-12-15 |
KR20040072025A (ko) | 2004-08-16 |
WO2002095822A3 (en) | 2003-07-10 |
AU2002303797A1 (en) | 2002-12-03 |
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