JP2005510081A5 - - Google Patents

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Publication number
JP2005510081A5
JP2005510081A5 JP2003546385A JP2003546385A JP2005510081A5 JP 2005510081 A5 JP2005510081 A5 JP 2005510081A5 JP 2003546385 A JP2003546385 A JP 2003546385A JP 2003546385 A JP2003546385 A JP 2003546385A JP 2005510081 A5 JP2005510081 A5 JP 2005510081A5
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JP
Japan
Prior art keywords
growth
low
density
plasma
energy
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Pending
Application number
JP2003546385A
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English (en)
Japanese (ja)
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JP2005510081A (ja
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Publication date
Priority claimed from EP01127834A external-priority patent/EP1315199A1/en
Application filed filed Critical
Publication of JP2005510081A publication Critical patent/JP2005510081A/ja
Publication of JP2005510081A5 publication Critical patent/JP2005510081A5/ja
Pending legal-status Critical Current

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JP2003546385A 2001-11-22 2002-09-05 低エネルギープラズマ強化化学蒸着法による高移動度のシリコンゲルマニウム構造体の製造方法 Pending JP2005510081A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP01127834A EP1315199A1 (en) 2001-11-22 2001-11-22 Formation of high-mobility silicon-germanium structures by low-energy plasma enhanced chemical vapor deposition
PCT/EP2002/009922 WO2003044839A2 (en) 2001-11-22 2002-09-05 Formation of high-mobility silicon-germanium structures by low-energy plasma enhanced chemical vapor deposition

Publications (2)

Publication Number Publication Date
JP2005510081A JP2005510081A (ja) 2005-04-14
JP2005510081A5 true JP2005510081A5 (https=) 2006-01-05

Family

ID=8179316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003546385A Pending JP2005510081A (ja) 2001-11-22 2002-09-05 低エネルギープラズマ強化化学蒸着法による高移動度のシリコンゲルマニウム構造体の製造方法

Country Status (6)

Country Link
US (1) US7115895B2 (https=)
EP (1) EP1315199A1 (https=)
JP (1) JP2005510081A (https=)
CN (1) CN100345254C (https=)
AU (1) AU2002335310A1 (https=)
WO (1) WO2003044839A2 (https=)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6855436B2 (en) * 2003-05-30 2005-02-15 International Business Machines Corporation Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal
US7678645B2 (en) 2003-03-26 2010-03-16 Eidgenoessische Technische Hochschule Zuerich Formation of thin semiconductor layers by low-energy plasma enhanced chemical vapor deposition and semiconductor heterostructure devices
EP1513233B1 (en) * 2003-09-05 2008-10-29 Epispeed S.A. InGaAs/GaAs lasers on Silicon produced by LEPECVD and MOCVD
DE602005027196D1 (de) 2004-04-30 2011-05-12 Dichroic Cell S R L Verfahren zur herstellung von virtuellen ge-substraten zur iii/v-integration auf si(001)
JP2007250903A (ja) * 2006-03-16 2007-09-27 Matsushita Electric Ind Co Ltd ヘテロ接合バイポーラトランジスタおよびその製造方法
EP2049939A1 (en) * 2006-08-11 2009-04-22 Paul Scherrer Institut Light modulators comprising si-ge quantum well layers
US8535060B2 (en) 2006-08-25 2013-09-17 Brain & Science Llc System and method for detecting a specific cognitive-emotional state in a subject
FR2914783A1 (fr) * 2007-04-03 2008-10-10 St Microelectronics Sa Procede de fabrication d'un dispositif a gradient de concentration et dispositif correspondant.
US8237126B2 (en) * 2007-08-17 2012-08-07 Csem Centre Suisse D'electronique Et De Mictrotechnique Sa X-ray imaging device and method for the manufacturing thereof
EP2207911A1 (en) * 2007-08-17 2010-07-21 Epispeed S.A. Apparatus and method for producing epitaxial layers
EP2251897B1 (en) * 2009-05-13 2016-01-06 Siltronic AG A method for producing a wafer comprising a silicon single crystal substrate having a front and a back side and a layer of SiGe deposited on the front side
TWI562195B (en) 2010-04-27 2016-12-11 Pilegrowth Tech S R L Dislocation and stress management by mask-less processes using substrate patterning and methods for device fabrication
CN103165420B (zh) * 2011-12-14 2015-11-18 中国科学院上海微系统与信息技术研究所 一种SiGe中嵌入超晶格制备应变Si的方法
KR102142707B1 (ko) * 2013-06-19 2020-08-07 엘지이노텍 주식회사 반도체 기판, 발광 소자 및 전자 소자
CN105632927B (zh) * 2014-10-30 2018-09-07 中芯国际集成电路制造(上海)有限公司 Pmos晶体管的形成方法
KR102465536B1 (ko) * 2016-06-08 2022-11-14 삼성전자주식회사 반도체 장치의 제조 방법
US20260033255A1 (en) * 2024-07-23 2026-01-29 Samsung Electronics Co., Ltd. Deposition by electron enhanced processes with positive substrate voltage

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0380077A3 (en) * 1989-01-25 1990-09-12 Hitachi, Ltd. Transistor provided with strained germanium layer
US5241197A (en) * 1989-01-25 1993-08-31 Hitachi, Ltd. Transistor provided with strained germanium layer
US5442205A (en) * 1991-04-24 1995-08-15 At&T Corp. Semiconductor heterostructure devices with strained semiconductor layers
MY127672A (en) * 1999-03-12 2006-12-29 Ibm High speed ge channel heterostructures for field effect devices

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