JP2005311199A - 基板の製造方法 - Google Patents

基板の製造方法 Download PDF

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Publication number
JP2005311199A
JP2005311199A JP2004128803A JP2004128803A JP2005311199A JP 2005311199 A JP2005311199 A JP 2005311199A JP 2004128803 A JP2004128803 A JP 2004128803A JP 2004128803 A JP2004128803 A JP 2004128803A JP 2005311199 A JP2005311199 A JP 2005311199A
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JP
Japan
Prior art keywords
substrate
layer
manufacturing
semiconductor substrate
gettering
Prior art date
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Application number
JP2004128803A
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English (en)
Japanese (ja)
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JP2005311199A5 (enExample
Inventor
Shuji Torihashi
修治 鳥觜
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Canon Inc
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Canon Inc
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Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2004128803A priority Critical patent/JP2005311199A/ja
Priority to US11/110,666 priority patent/US20050239267A1/en
Publication of JP2005311199A publication Critical patent/JP2005311199A/ja
Publication of JP2005311199A5 publication Critical patent/JP2005311199A5/ja
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
JP2004128803A 2004-04-23 2004-04-23 基板の製造方法 Withdrawn JP2005311199A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2004128803A JP2005311199A (ja) 2004-04-23 2004-04-23 基板の製造方法
US11/110,666 US20050239267A1 (en) 2004-04-23 2005-04-21 Substrate manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004128803A JP2005311199A (ja) 2004-04-23 2004-04-23 基板の製造方法

Publications (2)

Publication Number Publication Date
JP2005311199A true JP2005311199A (ja) 2005-11-04
JP2005311199A5 JP2005311199A5 (enExample) 2007-01-18

Family

ID=35137022

Family Applications (1)

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JP2004128803A Withdrawn JP2005311199A (ja) 2004-04-23 2004-04-23 基板の製造方法

Country Status (2)

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US (1) US20050239267A1 (enExample)
JP (1) JP2005311199A (enExample)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007322298A (ja) * 2006-06-02 2007-12-13 Dainippon Printing Co Ltd 加速度センサおよびその製造方法
JP2008060220A (ja) * 2006-08-30 2008-03-13 Disco Abrasive Syst Ltd ゲッタリング層形成装置
JP2009033123A (ja) * 2007-06-27 2009-02-12 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法および半導体装置の作製方法
JP2010018513A (ja) * 2008-07-09 2010-01-28 Commissariat A L'energie Atomique 結晶性シリコン基板の精製方法および太陽電池の製造プロセス
WO2012063774A1 (ja) * 2010-11-12 2012-05-18 住友電気工業株式会社 Ｉｉｉ族窒化物複合基板
KR20130069935A (ko) * 2011-12-19 2013-06-27 주식회사 엘지실트론 웨이퍼 제조 방법
KR20210156817A (ko) * 2018-11-30 2021-12-27 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 무금속 soi 웨이퍼의 제조 방법

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9177828B2 (en) * 2011-02-10 2015-11-03 Micron Technology, Inc. External gettering method and device
CN100437899C (zh) * 2006-01-27 2008-11-26 台湾积体电路制造股份有限公司 减少制程环境内的杂质的装置及其方法
KR100770269B1 (ko) * 2006-05-18 2007-10-25 삼성에스디아이 주식회사 박막트랜지스터의 제조방법
KR100770268B1 (ko) * 2006-05-18 2007-10-25 삼성에스디아이 주식회사 박막트랜지스터의 제조방법
EP2078307B1 (en) * 2006-11-02 2015-03-25 Imec Removal of impurities from semiconductor device layers
TWI419203B (zh) * 2008-10-16 2013-12-11 Sumco Corp 具吸附槽之固態攝影元件用磊晶基板、半導體裝置、背照式固態攝影元件及其製造方法
DE102009051009A1 (de) * 2009-10-28 2011-05-05 Siltronic Ag Verfahren zum Polieren einer Halbleiterscheibe aus einkristallinem Silizium
US8846500B2 (en) * 2010-12-13 2014-09-30 Semiconductor Components Industries, Llc Method of forming a gettering structure having reduced warpage and gettering a semiconductor wafer therewith
JP2015032690A (ja) * 2013-08-02 2015-02-16 株式会社ディスコ 積層ウェーハの加工方法
WO2019052194A1 (zh) * 2017-09-13 2019-03-21 厦门三安光电有限公司 一种半导体元件的固晶方法及半导体元件
JP7581098B2 (ja) * 2021-03-19 2024-11-12 キオクシア株式会社 半導体装置の製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4412255A (en) * 1981-02-23 1983-10-25 Optical Coating Laboratory, Inc. Transparent electromagnetic shield and method of manufacturing
US4910090A (en) * 1987-10-21 1990-03-20 Southwall Technologies, Inc. EMI/RFI shield for visual display terminals
EP0322720A3 (en) * 1987-12-25 1990-01-17 Asahi Glass Company Ltd. Electromagnetic wave shielding transparent body
EP1043768B1 (en) * 1992-01-30 2004-09-08 Canon Kabushiki Kaisha Process for producing semiconductor substrates
JP2908150B2 (ja) * 1992-11-27 1999-06-21 日本電気株式会社 Ｓｏｉ基板構造及びその製造方法
JP2806277B2 (ja) * 1994-10-13 1998-09-30 日本電気株式会社 半導体装置及びその製造方法
US5827602A (en) * 1995-06-30 1998-10-27 Covalent Associates Incorporated Hydrophobic ionic liquids
JPH115064A (ja) * 1997-06-16 1999-01-12 Canon Inc 試料の分離装置及びその方法並びに基板の製造方法
US5897362A (en) * 1998-04-17 1999-04-27 Lucent Technologies Inc. Bonding silicon wafers
US6376335B1 (en) * 2000-02-17 2002-04-23 Memc Electronic Materials, Inc. Semiconductor wafer manufacturing process
US6353220B1 (en) * 2000-02-01 2002-03-05 Raytheon Company Shielding of light transmitter/receiver against high-power radio-frequency radiation
US6376336B1 (en) * 2001-02-01 2002-04-23 Advanced Micro Devices, Inc. Frontside SOI gettering with phosphorus doping

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007322298A (ja) * 2006-06-02 2007-12-13 Dainippon Printing Co Ltd 加速度センサおよびその製造方法
JP2008060220A (ja) * 2006-08-30 2008-03-13 Disco Abrasive Syst Ltd ゲッタリング層形成装置
JP2009033123A (ja) * 2007-06-27 2009-02-12 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法および半導体装置の作製方法
KR101478812B1 (ko) * 2007-06-27 2015-01-02 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Ｓｏｉ 기판의 제조방법 및 반도체장치의 제조방법
JP2010018513A (ja) * 2008-07-09 2010-01-28 Commissariat A L'energie Atomique 結晶性シリコン基板の精製方法および太陽電池の製造プロセス
WO2012063774A1 (ja) * 2010-11-12 2012-05-18 住友電気工業株式会社 Ｉｉｉ族窒化物複合基板
JP2012116741A (ja) * 2010-11-12 2012-06-21 Sumitomo Electric Ind Ltd Ｉｉｉ族窒化物複合基板
KR20130069935A (ko) * 2011-12-19 2013-06-27 주식회사 엘지실트론 웨이퍼 제조 방법
KR20210156817A (ko) * 2018-11-30 2021-12-27 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 무금속 soi 웨이퍼의 제조 방법
KR102407399B1 (ko) 2018-11-30 2022-06-10 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 무금속 soi 웨이퍼의 제조 방법

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Publication number Publication date
US20050239267A1 (en) 2005-10-27

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