JP2005294871A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2005294871A JP2005294871A JP2005195940A JP2005195940A JP2005294871A JP 2005294871 A JP2005294871 A JP 2005294871A JP 2005195940 A JP2005195940 A JP 2005195940A JP 2005195940 A JP2005195940 A JP 2005195940A JP 2005294871 A JP2005294871 A JP 2005294871A
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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Abstract
【解決手段】 タブの半導体チップ搭載領域に搭載した半導体チップと、このタブの周囲に配置され封止体外に露出して外部端子となるリードとを電気的に接続した半導体装置において、前記タブのボンディング領域と半導体チップの電源回路用のパッドとを電気的に接続し、前記タブの一部を前記封止体外に露出させ、このタブの露出部分を半導体装置の電源用外部端子とする。
タブの露出部分を接地電源用外部端子として用いるため、リードを外部端子として用いていた従来の半導体装置と比較して、伝送経路が短縮され、その断面積が増加するため、低インダクタンス・低インピーダンス化を図ることが可能となる。
【選択図】 図2
Description
こうした底面端子型の半導体装置については、下記特許文献に開示されている。
本発明の前記ならびにその他の課題と新規な特徴は、本明細書の記述及び添付図面から明らかになるであろう。
タブの露出部分を接地電源用外部端子として用いるため、リードを外部端子として用いていた従来の半導体装置と比較して、伝送経路が短縮され、その断面積が増加するため、低インダクタンス・低インピーダンス化を図ることが可能となる。なお、従来の半導体装置にも、半導体チップを搭載するタブを封止体から露出させているものがあるが、それらの半導体装置ではタブを放熱板としても利用しているに過ぎず、単に放熱性を考慮しているに留まり、高周波特性の点は考慮されていない。
(1)本発明によれば、伝送経路が短縮され、その断面積が増加するため、接地伝送経路の低インダクタンス・低抵抗化を図ることが可能となるという効果がある。
(2)本発明によれば、ボンディングワイヤの短縮によって低インピーダンス化を図ることが可能となるという効果がある。
(3)本発明によれば、上記効果(1)(2)により、アイソレーション特性が向上するという効果がある。
(4)本発明によれば、上記効果(2)(1)により、RF特性が格段に向上するという効果がある。
なお、実施の形態を説明するための全図において、同一機能を有するものは同一符号を付け、その繰り返しの説明は省略する。
図1は本発明の一実施の形態であるQFP型半導体装置を封止体を透過して示す平面図であり、図1中のa‐a線に沿った縦断面図を基板実装状態として図2に示してある。
図7は本発明の他の実施の形態であるQFN型半導体装置を封止体を透過して示す平面図であり、図7中のa‐a線に沿った縦断面図を基板実装状態として図8に示してある。
Claims (2)
- タブの半導体チップ搭載領域に搭載した半導体チップと、このタブの周囲に配置され封止体外に露出して外部端子となる複数のリードとを電気的に接続した半導体装置において、
前記複数のリードの一部は前記タブに接続一体化され、前記タブに接続一体化されたリードの裏面側は部分的にエッチングされた構造であり、
前記半導体チップの接地電源用のパッドと前記タブに接続一体化されたリードの表面側とが電気的に接続され、前記タブの底面を前記封止体の底面から露出させ、この露出しているタブの底面を半導体装置の接地電源用外部端子としたことを特徴とする半導体装置。 - 前記半導体チップの接地電源用のパッドに接続される部分のリードと前記タブとの間が前記の部分的にエッチングされた構造であることを特徴とする請求項1に記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005195940A JP4252563B2 (ja) | 2005-07-05 | 2005-07-05 | 半導体装置 |
Applications Claiming Priority (1)
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JP2005195940A JP4252563B2 (ja) | 2005-07-05 | 2005-07-05 | 半導体装置 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2000296380A Division JP2002110889A (ja) | 2000-09-28 | 2000-09-28 | 半導体装置及びその製造方法 |
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JP2005294871A true JP2005294871A (ja) | 2005-10-20 |
JP4252563B2 JP4252563B2 (ja) | 2009-04-08 |
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JP2005195940A Expired - Fee Related JP4252563B2 (ja) | 2005-07-05 | 2005-07-05 | 半導体装置 |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009060093A (ja) * | 2007-08-06 | 2009-03-19 | Seiko Instruments Inc | 半導体装置 |
KR100939153B1 (ko) | 2007-12-11 | 2010-01-28 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 제조 방법 |
JP2012227347A (ja) * | 2011-04-19 | 2012-11-15 | Toyota Central R&D Labs Inc | 高周波装置 |
JP2013508974A (ja) * | 2009-10-19 | 2013-03-07 | ナショナル セミコンダクター コーポレーション | 向上した接地ボンド信頼性を有するリードフレーム・パッケージ |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05291483A (ja) * | 1992-04-10 | 1993-11-05 | Toshiba Corp | 半導体装置 |
JPH1174404A (ja) * | 1997-08-28 | 1999-03-16 | Nec Corp | ボールグリッドアレイ型半導体装置 |
JPH11233683A (ja) * | 1998-02-10 | 1999-08-27 | Dainippon Printing Co Ltd | 樹脂封止型半導体装置とそれに用いられる回路部材および樹脂封止型半導体装置の製造方法 |
JPH11260990A (ja) * | 1998-03-12 | 1999-09-24 | Matsushita Electron Corp | リードフレーム,樹脂封止型半導体装置及びその製造方法 |
-
2005
- 2005-07-05 JP JP2005195940A patent/JP4252563B2/ja not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05291483A (ja) * | 1992-04-10 | 1993-11-05 | Toshiba Corp | 半導体装置 |
JPH1174404A (ja) * | 1997-08-28 | 1999-03-16 | Nec Corp | ボールグリッドアレイ型半導体装置 |
JPH11233683A (ja) * | 1998-02-10 | 1999-08-27 | Dainippon Printing Co Ltd | 樹脂封止型半導体装置とそれに用いられる回路部材および樹脂封止型半導体装置の製造方法 |
JPH11260990A (ja) * | 1998-03-12 | 1999-09-24 | Matsushita Electron Corp | リードフレーム,樹脂封止型半導体装置及びその製造方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009060093A (ja) * | 2007-08-06 | 2009-03-19 | Seiko Instruments Inc | 半導体装置 |
KR100939153B1 (ko) | 2007-12-11 | 2010-01-28 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 제조 방법 |
JP2013508974A (ja) * | 2009-10-19 | 2013-03-07 | ナショナル セミコンダクター コーポレーション | 向上した接地ボンド信頼性を有するリードフレーム・パッケージ |
JP2012227347A (ja) * | 2011-04-19 | 2012-11-15 | Toyota Central R&D Labs Inc | 高周波装置 |
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