JP2013508974A - 向上した接地ボンド信頼性を有するリードフレーム・パッケージ - Google Patents
向上した接地ボンド信頼性を有するリードフレーム・パッケージ Download PDFInfo
- Publication number
- JP2013508974A JP2013508974A JP2012535229A JP2012535229A JP2013508974A JP 2013508974 A JP2013508974 A JP 2013508974A JP 2012535229 A JP2012535229 A JP 2012535229A JP 2012535229 A JP2012535229 A JP 2012535229A JP 2013508974 A JP2013508974 A JP 2013508974A
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- pad
- die
- integrated circuit
- circuit package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48471—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
- H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
- H01L2224/48477—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
- H01L2224/48478—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball
- H01L2224/48479—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
- H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
- H01L2224/48477—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
- H01L2224/48478—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball
- H01L2224/4848—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85009—Pre-treatment of the connector or the bonding area
- H01L2224/85051—Forming additional members, e.g. for "wedge-on-ball", "ball-on-wedge", "ball-on-ball" connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
- H01L2224/85207—Thermosonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Wire Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
Claims (20)
- 集積回路パッケージであって、
ダイ取り付けパッドと、前記ダイ取り付けパッドから物理的及び電気的に隔離される複数のリードと、前記ダイ取り付けパッドと一体的に形成され、前記ダイ取り付けパッドに機械的及び電気的に結合され、第1のボンディング領域を含む、第1のタイバーとを含むリードフレームであって、前記ダイ取り付けパッドが、前記第1のボンディング領域に対してダウンセットされるダイ搭載面を有する、前記リードフレーム、
前記ダイ取り付けパッドの前記ダイ搭載面上に搭載されるダイであって、多数のI/Oパッドを有する前記ダイ、
ボンディングワイヤの第1のセットであって、前記ボンディングワイヤの第1のセットの各ボンディングワイヤが、関連するI/Oパッドに取り付けられる第1の端部と、関連するリードに取り付けられる第2の端部とを有し、それにより、前記関連するI/Oパッドを前記関連するリードに電気的に結合する、前記ボンディングワイヤの第1のセット、及び、
ボンディングワイヤの第2のセットであって、前記ボンディングワイヤの第2のセット内に少なくとも1本のボンディングワイヤがあり、前記ボンディングワイヤの第2のセットの各ボンディングワイヤが、前記ダイ上の関連するI/Oパッドに取り付けられる第1の端部と前記第1のタイバー上の前記第1のボンディング領域に取り付けられる第2の端部とを有し、それにより、前記第1のボンディングワイヤの前記第1のボンディング領域への取り付け地点が、前記ダイ搭載面を囲む面に対してオフセットされる、前記ボンディングワイヤの第2のセット、
を含む、集積回路パッケージ。 - 請求項1に記載の集積回路パッケージであって、前記ダイ取り付けパッドが接地に電気的に結合され、前記ボンディングワイヤの第2のセット内のボンディングワイヤに取り付けられる各I/Oパッドが接地I/Oパッドである、集積回路パッケージ。
- 請求項1又は2に記載の集積回路パッケージであって、前記第1のボンディング領域の幅が、前記第1のタイバーの他の部分の幅より実質的に大きい、集積回路パッケージ。
- 請求項1〜3のいずれかに記載の集積回路パッケージであって、
前記ダイと、前記ボンディングワイヤと、前記リードフレームの少なくとも一部とを封止する一方で、前記ダイ取り付けパッドの底面を露出させておき、電気的コンタクトとして機能するようにするプラスチック封止材、
を更に含む、集積回路パッケージ。 - 電子デバイスであって、
接地パッドを有する基板、及び
前記基板上に取り付けられた請求項4に記載の集積回路パッケージを含み、
前記ボンディングワイヤの第2のセット内のボンディングワイヤに取り付けられた各I/Oパッドが接地I/Oパッドであり、前記ダイ取り付けパッドの底面が、前記基板の接地パッドに電気的及び機械的に結合され、それにより、前記ボンディングワイヤ、前記第1のタイバー、及び前記ダイ取り付けパッドを介して前記接地I/Oパッドを接地に電気的に接続するための、
電子デバイス。 - 請求項5に記載の集積回路パッケージであって、前記パッケージが、前記パッケージの対向する側部に2列のリードを有し、前記パッケージの対向する端部から延びるリードを有さない、デュアルインラインパッケージであり、前記第1のタイバーが前記パッケージのリードを有さない端部に向かって延びる、集積回路パッケージ。
- 請求項1〜6のいずれかに記載の集積回路パッケージであって、前記ボンディングワイヤの第2のセットが、各々が前記第1のボンディング領域に結合される複数のボンディングワイヤを含む、集積回路パッケージ。
- 請求項1〜7のいずれかに記載の集積回路パッケージであって、
前記ダイ取り付けパッドと一体的に形成され、第2のボンディング領域を有する第2のタイバーであって、少なくとも1本の付加的なボンディングワイヤが第2の拡大されたボンディング領域に取り付けられる、前記第2のタイバー、
を更に含む、集積回路パッケージ。 - 請求項8に記載の集積回路パッケージであって、前記第1及び第2のボンディング領域の上面が、前記リードの上面と実質的に同一平面上にある、集積回路パッケージ。
- 請求項1〜9のいずれかに記載の集積回路パッケージであって、前記第1のボンディング領域の形状が、前記ダイに向かって内側に延びる少なくとも1つのフィンガー部を有する、ヒューズド(fused)リード形状である、集積回路パッケージ。
- 集積回路パッケージであって、
ダイ取り付けパッド及び複数のリードを有するリードフレーム、
前記ダイ取り付けパッド上に取り付けられ、複数のI/Oパッドを含む、ダイ、
前記ダイ取り付けパッド上に形成される少なくとも1つのワイヤボンディングバンプ、及び、
各ボンディングワイヤが関連するI/Oパッドに電気的に接続されている多数のボンディングワイヤを含み、
前記ボンディングワイヤの第1のセットの各々が、関連するI/Oパッドを関連するリードに電気的に接続し、前記ボンディングワイヤの少なくとも1本が、前記ダイ取り付けパッドに間接的に固定されるダウンボンディングワイヤであり、各ダウンボンディングワイヤが、関連するワイヤボンディングバンプにステッチボンディングされて前記ダウンボンディングワイヤを前記ダイ取り付けパッドに電気的に接続する、
集積回路パッケージ。 - 集積回路パッケージであって、
複数のリード、ダイ取り付けパッド、及び前記ダイ取り付けパッドに接続される少なくとも1つのタイバーを含み、ワイヤボンディング着地領域を含むリードフレームであって、前記ダイ取り付けパッドと前記リードの各々とが前記パッケージの電気的コンタクトとして機能し、前記タイバーが前記パッケージの電気的コンタクトとして機能せず、前記ダイの支持面が前記ワイヤボンディング着地領域に対してダウンセットされている、前記リードフレーム、
前記ダイ取り付けパッド上に取り付けられ、少なくとも1つの接地I/Oパッドを含む複数のI/Oパッドを含むダイ、
各ボンディングワイヤが関連するI/Oパッドに電気的に接続される多数のボンディングワイヤであって、前記ボンディングワイヤの第1のセットの各々が、関連するI/Oパッドを関連するリードに電気的に接続し、前記ボンディングワイヤの少なくとも1本が、関連する接地I/Oパッドを前記タイバーの前記ワイヤボンディング着地領域に接続する接地ボンディングワイヤであり、それにより、前記接地ボンディングワイヤを前記ダイ取り付けパッドに間接的に電気的に接続するためのものであり、それにより、前記接地ボンディングワイヤの前記ワイヤボンディング着地領域への取り付け地点が、前記ダイ搭載面を囲む面に対して垂直にオフセットされる、前記多数のボンディングワイヤ、及び、
前記ダイと、前記ボンディングワイヤと、前記リードフレームの少なくとも一部とを封止する封止材であって、前記ダイ取り付けパッド底面が前記パッケージの底面で露出されて、前記ダイ取り付けパッドの電気的接地への電気的結合を円滑化し、それにより、前記接地I/Oパッドを前記接地ボンディングワイヤ、前記タイバー、及び前記ダイ取り付けパッドを介して接地に電気的に接続するための、前記封止材、
を含む、集積回路パッケージ。 - 請求項1に記載の集積回路パッケージであって、前記第1のボンディング領域の幅が前記第1のタイバーの他の部分の幅より実質的に大きい、集積回路パッケージ。
- 請求項1に記載の集積回路パッケージであって、
前記ダイと、前記ボンディングワイヤと、前記リードフレームの少なくとも一部とを封止する一方で、前記ダイ取り付けパッドの底面を露出させておき、電気的コンタクトとして機能するようにするプラスチック封止材を更に含む、集積回路パッケージ。 - 電子デバイスであって、
接地パッドを有する基板、及び、
前記基板上に取り付けられた請求項14に記載の集積回路パッケージを含み、前記ボンディングワイヤの第2のセット内のボンディングワイヤに取り付けられた各I/Oパッドが、接地I/Oパッドであり、前記ダイ取り付けパッドの底面が、前記基板の接地パッドに電気的及び機械的に結合され、それにより、前記接地I/Oパッドを前記ボンディングワイヤ、前記第1のタイバー、及び前記ダイ取り付けパッドを介して接地に電気的に接続するための、
電子デバイス。 - 請求項15に記載の集積回路パッケージであって、前記パッケージが、前記パッケージの対向する側部に2列のリードを有し、前記パッケージの対向する端部から延びるリードを有さない、デュアルインラインパッケージであり、前記第1のタイバーが前記パッケージのリードを有さない端部に向かって延びる、集積回路パッケージ。
- 請求項1に記載の集積回路パッケージであって、前記ボンディングワイヤの第2のセットが、各々が前記第1のボンディング領域に結合される複数のボンディングワイヤを含む、集積回路パッケージ。
- 請求項1に記載の集積回路パッケージであって、
前記ダイ取り付けパッドと一体的に形成され、第2のボンディング領域を有する第2のタイバーであって、少なくとも1本の付加的なボンディングワイヤが第2の拡大されたボンディング領域に取り付けられる、前記第2のタイバー、
を更に含む、集積回路パッケージ。 - 請求項18に記載の集積回路パッケージであって、前記第1及び第2のボンディング領域の上面が、前記リードの上面と実質的に同一平面上にある、集積回路パッケージ。
- 請求項1に記載の集積回路パッケージであって、前記第1のボンディング領域の形状が、前記ダイに向かって内側に延びる少なくとも1つのフィンガー部を有する、ヒューズドリード形状である、集積回路パッケージ。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/581,609 US8093707B2 (en) | 2009-10-19 | 2009-10-19 | Leadframe packages having enhanced ground-bond reliability |
US12/581,609 | 2009-10-19 | ||
PCT/US2010/052061 WO2011049764A2 (en) | 2009-10-19 | 2010-10-08 | Leadframe packages having enhanced ground-bond reliability |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013508974A true JP2013508974A (ja) | 2013-03-07 |
JP2013508974A5 JP2013508974A5 (ja) | 2013-11-28 |
Family
ID=43878665
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012535229A Pending JP2013508974A (ja) | 2009-10-19 | 2010-10-08 | 向上した接地ボンド信頼性を有するリードフレーム・パッケージ |
Country Status (5)
Country | Link |
---|---|
US (1) | US8093707B2 (ja) |
JP (1) | JP2013508974A (ja) |
CN (1) | CN102576698A (ja) |
TW (1) | TWI515855B (ja) |
WO (1) | WO2011049764A2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2024166846A1 (ja) * | 2023-02-08 | 2024-08-15 | ローム株式会社 | 半導体装置 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110115063A1 (en) * | 2009-11-18 | 2011-05-19 | Entropic Communications, Inc. | Integrated Circuit Packaging with Split Paddle |
US20110140253A1 (en) * | 2009-12-14 | 2011-06-16 | National Semiconductor Corporation | Dap ground bond enhancement |
US9337240B1 (en) * | 2010-06-18 | 2016-05-10 | Altera Corporation | Integrated circuit package with a universal lead frame |
TWI489607B (zh) * | 2010-11-23 | 2015-06-21 | 登豐微電子股份有限公司 | 封裝結構 |
CN102800765A (zh) * | 2012-03-21 | 2012-11-28 | 深圳雷曼光电科技股份有限公司 | Led封装结构及其封装工艺 |
US9147656B1 (en) * | 2014-07-11 | 2015-09-29 | Freescale Semicondutor, Inc. | Semiconductor device with improved shielding |
US9922904B2 (en) | 2015-05-26 | 2018-03-20 | Infineon Technologies Ag | Semiconductor device including lead frames with downset |
US10249556B1 (en) * | 2018-03-06 | 2019-04-02 | Nxp B.V. | Lead frame with partially-etched connecting bar |
US20190287918A1 (en) * | 2018-03-13 | 2019-09-19 | Texas Instruments Incorporated | Integrated circuit (ic) packages with shields and methods of producing the same |
CN109192715B (zh) * | 2018-09-20 | 2024-03-22 | 江苏长电科技股份有限公司 | 引线框结构、封装结构及其制造方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11150143A (ja) * | 1997-11-17 | 1999-06-02 | Fujitsu Ltd | 半導体装置及びその製造方法及びリードフレーム及びその製造方法 |
JPH11297918A (ja) * | 1998-04-10 | 1999-10-29 | Nec Corp | リードフレーム及び半導体装置及び半導体装置の製造方法 |
JP2000252403A (ja) * | 1999-02-26 | 2000-09-14 | Mitsui High Tec Inc | 半導体装置 |
JP2005294871A (ja) * | 2005-07-05 | 2005-10-20 | Renesas Technology Corp | 半導体装置 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5328079A (en) * | 1993-03-19 | 1994-07-12 | National Semiconductor Corporation | Method of and arrangement for bond wire connecting together certain integrated circuit components |
US6072228A (en) * | 1996-10-25 | 2000-06-06 | Micron Technology, Inc. | Multi-part lead frame with dissimilar materials and method of manufacturing |
US6398556B1 (en) * | 1998-07-06 | 2002-06-04 | Chi Fai Ho | Inexpensive computer-aided learning methods and apparatus for learners |
WO2001009953A1 (en) * | 1999-07-30 | 2001-02-08 | Amkor Technology, Inc. | Lead frame with downset die pad |
KR100359304B1 (ko) * | 2000-08-25 | 2002-10-31 | 삼성전자 주식회사 | 주변 링 패드를 갖는 리드 프레임 및 이를 포함하는반도체 칩 패키지 |
US6424024B1 (en) * | 2001-01-23 | 2002-07-23 | Siliconware Precision Industries Co., Ltd. | Leadframe of quad flat non-leaded package |
US20020096766A1 (en) * | 2001-01-24 | 2002-07-25 | Chen Wen Chuan | Package structure of integrated circuits and method for packaging the same |
US6661083B2 (en) * | 2001-02-27 | 2003-12-09 | Chippac, Inc | Plastic semiconductor package |
TW552689B (en) * | 2001-12-21 | 2003-09-11 | Siliconware Precision Industries Co Ltd | High electrical characteristic and high heat dissipating BGA package and its process |
DE10392377T5 (de) * | 2002-03-12 | 2005-05-12 | FAIRCHILD SEMICONDUCTOR CORP. (n.d.Ges.d. Staates Delaware) | Auf Waferniveau beschichtete stiftartige Kontakthöcker aus Kupfer |
US7229906B2 (en) * | 2002-09-19 | 2007-06-12 | Kulicke And Soffa Industries, Inc. | Method and apparatus for forming bumps for semiconductor interconnections using a wire bonding machine |
DE10297823T5 (de) * | 2002-12-10 | 2005-10-20 | Infineon Technologies Ag | Verfahren zum Kapseln intergrierter Schaltungen und über das Verfahren hergestellte integrierte Schaltungsbausteine |
TWI250632B (en) * | 2003-05-28 | 2006-03-01 | Siliconware Precision Industries Co Ltd | Ground-enhancing semiconductor package and lead frame |
US7049683B1 (en) * | 2003-07-19 | 2006-05-23 | Ns Electronics Bangkok (1993) Ltd. | Semiconductor package including organo-metallic coating formed on surface of leadframe roughened using chemical etchant to prevent separation between leadframe and molding compound |
KR100536898B1 (ko) * | 2003-09-04 | 2005-12-16 | 삼성전자주식회사 | 반도체 소자의 와이어 본딩 방법 |
US7214606B2 (en) * | 2004-03-11 | 2007-05-08 | Asm Technology Singapore Pte Ltd. | Method of fabricating a wire bond with multiple stitch bonds |
US7247937B2 (en) * | 2005-01-06 | 2007-07-24 | Via Technologies, Inc. | Mounting pad structure for wire-bonding type lead frame packages |
US8937393B2 (en) * | 2007-05-03 | 2015-01-20 | Stats Chippac Ltd. | Integrated circuit package system with device cavity |
-
2009
- 2009-10-19 US US12/581,609 patent/US8093707B2/en active Active
-
2010
- 2010-10-08 CN CN2010800427454A patent/CN102576698A/zh active Pending
- 2010-10-08 WO PCT/US2010/052061 patent/WO2011049764A2/en active Application Filing
- 2010-10-08 JP JP2012535229A patent/JP2013508974A/ja active Pending
- 2010-10-18 TW TW099135404A patent/TWI515855B/zh active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11150143A (ja) * | 1997-11-17 | 1999-06-02 | Fujitsu Ltd | 半導体装置及びその製造方法及びリードフレーム及びその製造方法 |
JPH11297918A (ja) * | 1998-04-10 | 1999-10-29 | Nec Corp | リードフレーム及び半導体装置及び半導体装置の製造方法 |
JP2000252403A (ja) * | 1999-02-26 | 2000-09-14 | Mitsui High Tec Inc | 半導体装置 |
JP2005294871A (ja) * | 2005-07-05 | 2005-10-20 | Renesas Technology Corp | 半導体装置 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2024166846A1 (ja) * | 2023-02-08 | 2024-08-15 | ローム株式会社 | 半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
WO2011049764A3 (en) | 2011-11-17 |
US8093707B2 (en) | 2012-01-10 |
TW201125092A (en) | 2011-07-16 |
TWI515855B (zh) | 2016-01-01 |
CN102576698A (zh) | 2012-07-11 |
WO2011049764A2 (en) | 2011-04-28 |
US20110089556A1 (en) | 2011-04-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8093707B2 (en) | Leadframe packages having enhanced ground-bond reliability | |
US9087827B2 (en) | Mixed wire semiconductor lead frame package | |
US9385072B2 (en) | Method of manufacturing semiconductor device and semiconductor device | |
US6762079B2 (en) | Methods for fabricating dual loc semiconductor die assembly employing floating lead finger structure | |
JP5100967B2 (ja) | リードフレーム、これを利用した半導体チップパッケージ及びその製造方法 | |
JPH06105721B2 (ja) | 半導体装置 | |
US6396129B1 (en) | Leadframe with dot array of silver-plated regions on die pad for use in exposed-pad semiconductor package | |
JP2013508974A5 (ja) | ||
JP2007521643A (ja) | 受動デバイスを有するリードフレーム | |
JP2014515189A (ja) | カスタマイズされた占有面積を有する極薄パワートランジスタ及び同期バックコンバータ | |
JPH09312375A (ja) | リードフレーム、半導体装置及び半導体装置の製造方法 | |
JP3470111B2 (ja) | 樹脂封止型半導体装置の製造方法 | |
WO2007018473A1 (en) | Leadframe and semiconductor package | |
KR20010059916A (ko) | 멀티칩 모듈 반도체패키지 | |
JP2001015669A (ja) | リードフレームとそれを用いた樹脂封止型半導体装置およびその製造方法 | |
JP2006032773A (ja) | 半導体装置 | |
JP4040549B2 (ja) | 半導体装置 | |
JPH08227903A (ja) | 半導体装置 | |
JP3468447B2 (ja) | 樹脂封止型半導体装置及びその製造方法 | |
JP2003007953A (ja) | 樹脂封止型半導体装置およびその製造方法 | |
KR20010045680A (ko) | 리드 온 칩형 반도체 칩 패키지 | |
JP2001044351A (ja) | 半導体装置およびその製造方法 | |
JPH06302762A (ja) | 樹脂封止型半導体装置 | |
JPH08227966A (ja) | 半導体装置 | |
JP2005093469A (ja) | 半導体装置およびその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20131008 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20131008 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20141120 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20141125 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20150225 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20150323 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20150424 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150522 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20150616 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20151007 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20151015 |
|
A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20151120 |