WO2001009953A1 - Lead frame with downset die pad - Google Patents
Lead frame with downset die pad Download PDFInfo
- Publication number
- WO2001009953A1 WO2001009953A1 PCT/US2000/020898 US0020898W WO0109953A1 WO 2001009953 A1 WO2001009953 A1 WO 2001009953A1 US 0020898 W US0020898 W US 0020898W WO 0109953 A1 WO0109953 A1 WO 0109953A1
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- Prior art keywords
- die pad
- central portion
- peripheral portion
- electronic device
- peripheral
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
A plastic package for an electronic device is disclosed, along with leadframes and methods of making the package. The package includes a die pad having a lower surface exposed at a lower surface of the package, and a peripheral portion that extends upward into a central portion of the package. A bond wire connects the peripheral portion of the die pad to a ground voltage input pad of an encapsulated electronic device. A secure connection is achieved. Further, the encapsulant material fills in beneath the raised peripheral portion of the die pad and thereby locks the die pad to the encapsulant material.
Description
LEAD FRAME WITH DOWNSET DIE PAD
INTRODUCTION The present invention involves packages for electronic devices, and leadframes and methods for making such packages.
BACKGROUND
Conventional plastic packages include a planar metal die pad, metal leads surrounding the die pad, an electronic device on the die pad, and conductive connectors, e.g., metal bond wires, to connect the electronic device to the leads. Hardened encapsulant material, such as epoxy, forms a package body and encapsulates all of the above elements. Often, the die pad is downset below the leads and below a central horizontal plane of the package. In certain applications, such as cellular phones, a lower surface of the die pad is exposed at the bottom of the package so that the die pad may be conductively connected to a ground plane of a printed circuit board. In such a configuration, a ground voltage input pad on the electronic device is connected by a bond wire to the die pad, and the exposed surface of the die pad is connected by a conductive connector (such as a solder ball or a conductive adhesive) to the ground plane of the printed circuit board.
In such applications, two problems can arise due to the thermal expansions and contractions that accompany the encapsulation process, and the difference in the thermal performance of the encapsulant material and the metal die pad. First, the die pad may separate from the hardened encapsulant material. This problem is known as delamination. Second, the connection between the bond wire and the die pad may fail, which means that the electronic device will either have an intermittent connection to the ground voltage or no connection to ground voltage. Accordingly, there is a need for a more reliable package for these applications.
SUMMARY OF THE INVENTION
The present invention solves the above problems by including a package with a means to enhance the connection of the die pad to the encapsulant material and a means to
enhance the performance of the conductive connection between the electronic device and the die pad. The above package is made using an inventive metal leadframe.
A leadframe of the present invention includes a metal die pad and a plurality of metal leads adjacent to the die pad. The die pad has a central portion that is downset from one or more peripheral portions that are adjacent to the central portion. In one embodiment of the die pad, the peripheral portion surrounds the die pad. In another embodiment of the die pad, two peripheral portions are adjacent to parallel sides of a rectangular die pad. Another embodiment of the die pad includes one or more protrusions along peripheral sides of a central portion of the die pad. A method of making such a leadframe also is within the present invention. Step 1 of the method includes providing a metal sheet. Step 2 patterns the metal sheet to form a die pad and leads adjacent to the die pad. The die pad includes a central portion and one or more peripheral portions that are laterally spaced from the central portion. One or more open spaces are between the central portion of the die pad and the peripheral portions of the die pad. The open spaces are spanned by metal connectors. Step 3 downsets the central portion of the die pad from the leads and the peripheral portion (or portions) of the die pad so that the leads, the central area of the die pad and the peripheral portion (or portions) of the die pad are in different, albeit parallel, horizontal planes. In other words, the peripheral portion of the die pad is below the leads, and the central portion of the die pad is below the peripheral portion.
Again, variations of the die pad are possible. The peripheral portion of the die pad may surround the central area. Alternatively, separate peripheral portions each adjacent to a side of the central area of the die pad may be formed. In addition, protrusions adjacent to a perimeter of the central portion of the die pad may be formed. A package within the present invention is made from the inventive leadframe(s).
The package includes an electronic device on the downset central portion of the die pad. The electronic device is conductively connected to the leads and the peripheral portion (or portions) of the die pad. The electronic device also may be conductively connected to any peripheral protrusions in the central area of the die pad. An encapsulant material forms the package body and covers the peripheral portion(s) of the die pad and fills in underneath the peripheral portions of the die pad and any protrusions in the central portion of the die pad. This underfilling locks the die pad to the encapsulant material. The surface of the die pad
opposite the electronic device, however, remains exposed for connection to a printed circuit board ground voltage pad.
The closeness of the peripheral portions to the bonding areas of the electronic device shorten the length of the bond wires connecting the device to the peripheral portion(s) of the die pad. Further, by having the peripheral portion of the die pad entirely within the package body and surrounded by encapsulant material, any thermal stresses on the bond wire that connects the device to the peripheral portion of the die pad are reduced.
This allows for a more reliable conductive connection of the conductive pads of the electronic device to the die pad, and from there to ground voltage. A method of making the above described package also is within the present invention. The method includes, as Step 1, providing a leadframe as described above.
Step 2 places an electronic device on said second surface. Step 3 places a conductive connector between each of a plurality of leads and the electronic device. Step 4 places a conductive connector between the electronic device and the peripheral portion of die pad, which is vertically closer to the bonding areas of the electronic device than the central portion of the die pad.
There are numerous packaging applications for the inventive leadframes, packages, and methods described herein, including, but not limited to, Thin Quad Flat Package
(TQFP) applications, Thin Shrink Small Outline ("TSSOP") applications, and Small Outline Integrated Circuit ("SOIC") applications.
The above aspects of the invention will be described in detail below.
BRIEF DESCRIPTION OF DRAWINGS
Figure 1 is a cross-sectional view of a package containing an electronic device. Figure 2 is a perspective view of a leadframe used to make the package of Figure 1.
Figure 3 is a perspective view of a first alternative leadframe. Figure 4 is a perspective view of a second alternative leadframe.
DETAILED DESCRIPTION Figure 1 is a cross sectional view of a package 10 within the present invention.
Package 10 includes a package body formed of a hardened adhesive and insulative encapsulant material 11. Within encapsulant material 11 is an electronic device 12. Device 12 includes a top surface 13 and an opposite bottom surface 14. Top surface 13
includes a plurality of conductive pads 15 that are connected to internal circuitry of device 12. A plurality of metal leads 27 are adjacent to die pad 16 of package 10.
Die pad 13 includes a central portion 17, a first peripheral portion 18, and a second peripheral portion 19 that is on an opposite side of central portion 17 from first peripheral portion 18. Central portion 17 has a planar first surface 20 on which device 12 is placed and an opposite planar second surface 21 that is exposed at the bottom of package 10. None or no significant encapsulant material covers second surface 21. The entirety of first peripheral portion 18 and second peripheral portion 19 of die pad 16 is covered with encapsulant material 11. First peripheral portion 18 of die pad 16 includes a first upper surface 22 and an opposite lower second surface 23. Second peripheral portion 19 of die pad 16 includes a first upper surface 24 and an opposite lower second surface 25. Bond wire connection areas 26 on upper first surfaces 22 and 25 are in a common horizontal plane that is closer to the central horizontal plane of the package than the horizontal plane of central portion 17 of die pad 16 is to the central horizontal plane of package 10. In other words, bond wire connection areas 26 are vertically closer to top surface 13 of device 12 and leads 27 than central portion 17 of die pad 16 is to top surface 13 of device 12 because central portion 17 of die pad 16 is downset from bond wire connection areas 26 of peripheral portions 18 and 19 of die pad 16. Conductive metal bond wires 28 connect pads 15 to leads 27. Another bond wire
28 connects bonding area 26 of first peripheral portion 18 of die pad 16 to a ground voltage input pad 15 of electronic device 12. Optionally, a bond wire 28 also connects bonding area 26 of second peripheral portion 19 to a ground voltage input pad 15. A plurality of bond wires 28 may connect between electronic device 12 and peripheral portions 18 and 19 of die pad 16. In use of the package, exposed second surface 21 may be conductively connected to an external ground voltage pad of a printed circuit board (not shown). The surfaces of leads 27 and bond wire attachment area 26 may be plated, for example with silver, to facilitate the connection of bond wires.
The presence of encapsulant material 11 beneath lower surface 23 of peripheral portion 18 of die pad 16 and beneath lower surface 25 of peripheral portion 18 of die pad 16 enhances the connection of die pad 16 to encapsulant 11. Further, the location of upper first surface 22 of peripheral portion 18 and upper surface 24 of peripheral portion 19 of die pad 16 vertically above first surface 20 of central area 17 of die pad 16, i.e., vertically
closer to the top surface 13 and bonding pads 15 of device 12, allows for a shorter and fully encapsulated bond wire 28 between electronic device 12 and connection areas 26 of peripheral portions 18 and 19 of die pad 16. This enhances the reliability of the connection to ground. Figure 2 is a perspective view of a leadframe 40 used to make package 10 of Figure
1. Figure 2 shows that central portion 17 of die pad 16 has a rectangular perimeter with four sides. A tie bar 42 connects peripheral portions 18 and 19 of die pad 16 to the outer frame (not shown) of the leadframe.
In Figure 2, first peripheral portion 18 and second peripheral portion 19 of die pad 16 are adjacent to and extend fully across parallel sides of central portion 17. Upper surface 20 of central area 17 and upper surface 22 of peripheral portion 18 and upper surface 24 of peripheral portion 19 of die pad 16 are planar and face in the same direction. In a package, upper surfaces 22 and 24 are connected to ground voltage input pads of device 12 by bond wires 28. Sloped downset sections 41 of peripheral portions 18 and 19 of die pad 16 of Figure 2 show that central portion 17 is downset and spaced laterally apart from peripheral portions 18 and 19. In other words, upper surface 20 of central portion 17 of die pad 16 is a parallel but vertically lower horizontal plane that upper surfaces 22 and 24 of peripheral portions 18 and 19, respectively. Upper surfaces 22 and 24 are in a common horizontal plane. Through use of a double downset technique, peripheral portions 18 and 19 are downset from leads 27, albeit a lesser downset than the downset of central portion 17 from leads 27.
In a package, encapsulant material fills in under peripheral portions 18 and 19 and locks die pad 16 to the encapsulant material.
Figure 3 is an alternative leadframe 50 that can be used to make a package similar to package 10 of Figure 1. The sole difference between the packages would be in the configuration of the die pad and possibly in the connection of the electronic device to the die pad.
Leadframe 50 of Figure 3 is identical to leadframe 40 of Figure 3, except for the addition of two protrusions 51 which are located near the perimeter of central portion 17 of die pad 54. The two protrusions 51 are located centrally and adjacent to parallel sides of central portion 17 and are located 90 degrees apart from peripheral portions 18 and 19 of die pad 54.
Each protrusion 51 extends upward from upper surface 20 of central portion 17 of the die pad. Each protrusion 51 includes a planar upper first surface 52, which in a common horizontal plane with first surfaces 22 and 24 of peripheral portions 18 and 19, respectively, of die pad 54. Downset portion 41 on protrusions 51 show that central portion 17 of die pad 54 is downset from upper surface 52 of protrusions 51, and both are below leads 28. Opposite upper surface 52 is lower surface 53 of protrusions 51. In a package, encapsulant material covers protrusion 51 , and encapsulant material under lower surface 53 locks the die pad to the encapsulant material. Optionally, in a package, bond wires 28 may connect ground voltage input pads 15 of an electronic device 12 to upper first surfaces 52 of protrusions 51 as well as to peripheral portions 18 and 19 of the die pad 54.
Figure 4 shows an alternative leadframe 60 within the present invention. Again, leadframe 60 has features in common with leadframe 40 of Figure 2 and can be used to make a package like package 10 of Figure 1. The difference between leadframe 40 of Figure 2 and leadframe 60 of Figure 4 is that a peripheral portion 62 of die pad 61 surrounds central portion 17 of die pad 61. Ten sloped downset portions 41 of peripheral portion 62 connect peripheral portion 62 to central portion 17 of die pad 61 and space peripheral portion 62 laterally and vertically apart from central portion 17. In a package, encapsulant material covers peripheral portion 62, and encapsulant material under lower surface 64 of peripheral portion 62 locks the die pad to the encapsulant material.
Optionally, in a package, one or more bond wires 28 may connect ground voltage input pads 15 of an electronic device 12 to upper surface 63 of peripheral portion 62. Upper surface 63 of peripheral portion 62 is in a parallel but vertically separate horizontal plane than central portion 17 of die pad 61. A method of making the leadframes of the present invention, such as the leadframes in Figures 2-4, also is within the present invention. Step 1 of the method provides a planar metal sheet. Any of the common leadframe metals may be used, such as copper, copper alloys, or Alloy 42. Step 2 patterns the leadframe. The patterning makes holes of various sizes and shapes in the metal sheet. Step 2 is performed using conventional methods such as progressive stamping, or chemical etching using a photoresist mask. Typically, an array of leadframes is made in a single sheet of metal, and the leadframes and packages are processed in parallel. Optionally, a next step plates the
portions of the die pad and leads to which bond wires or equivalent conductors will be connected. Common plating metals, such as silver or nickel palladium, are used.
Step 3 is a double downset step. Step 3 downsets peripheral portions 18 and 19 of die pad 16 below leads 27, and downsets the central portion 17 of the die pad below peripheral portions 18 and 19.
Downsetting is a stamping type of method that stretches the metal between adjacent parts. For example, referring to leadframe 60 of Figure 4, there are ten metal downset connectors 41 between peripheral portion 62 and central portion 17 of die pad 61, and these connectors are stretched and sloped during the downset step. The amount of downsetting varies depending, for example, on the thickness of the package.
A method of making the packages disclosed herein from the inventive leadframes also is within the present invention. Step 1 provides a leadframe such as shown in Figures 2-4 or equivalent. Referring to Figures 1 and 2, Step 2 places an electronic device 12 on an upper surface 20 of central portion 17 of die pad 16, and attaches the electronic device with a conventional adhesive using conventional techniques. Step 3 connects bond wires 28 between conductive pads 15 on device 12 and leads 27. Step 4 connects one or more bond wires 28 from ground voltage input pads 15 of device 12 to upper surface 22 of peripheral portion 18 and/or to upper surface 24 of peripheral portion 19 of die pad 16. Referring to Figures 1 and 2, Step 5 encapsulates the package using conventional techniques, such as injection or transfer molding using epoxy or other plastic molding compounds. During encapsulation, encapsulation material covers electronic device 12, bond wires 28, upper surface 20 and peripheral portions 18 and 19. Encapsulant material fills in beneath lower surfaces 23 and 25 of peripheral portions 18 and 19, respectively. This locks die pad 16 to the encapsulant material. However, encapsulant material does not cover, or does not significantly cover, lower surface 21 of central area 17 of die pad 16. Lower surface 21 remains exposed at the bottom surface of the package (Figure 1).
A completed package is mounted by soldering leads 27 to a printed circuit board, and by conductively connecting the exposed lower surface 21 of the die pad to a ground voltage pad on the printed circuit board. The embodiments described herein are merely examples of the present invention.
Artisans will appreciate that variations are possible within the scope of the claims.
Claims
1. A leadframe comprising; a metal die pad and a plurality of metal leads adjacent to said die pad; wherein said die pad includes a central portion and a first peripheral portion adjacent to the central portion; wherein first peripheral portion has a first surface in a first horizontal plane and an opposite second surface, and the central portion has a third surface in a second horizontal plane and an opposite fourth surface, wherein the first horizontal plane is parallel to the second horizontal plane, and the first surface and the second surface are a vertical distance from the third and forth surfaces.
2. The leadframe of claim 1, wherein said first peripheral portion surrounds the central portion.
3. The leadframe of claim 1 , wherein said die pad further comprises a second peripheral portion adjacent to the central portion of the die pad and a lateral distance from the first peripheral portion; wherein said second peripheral portion has a fifth surface in the first horizontal plane and an opposite sixth surface, and the fifth surface and the sixth surface sixth surface are a vertical distance from the third and forth surfaces.
4. The leadframe of claim 3, wherein said central portion of the die pad has a perimeter and includes one or more protrusions within said perimeter, wherein each such protrusion has a seventh surface in the first horizontal plane.
5. The leadframe of claim 3, wherein the central portion of the die pad has a rectangular perimeter with four sides, and the first and second peripheral portions are adjacent to parallel sides of the central portion.
A leadframe comprising: a die pad and a plurality of leads adjacent to the die pad;
wherein said die pad includes a central portion and a first peripheral portion adjacent to the central portions; and the central portion of the die pad is downset from the peripheral portion and the leads.
7. The leadframe of claim 6, wherein the first peripheral portion of the die pad surrounds the central portion of the die pad.
8. The leadframe of claim 6, wherein the die pad further comprises a second peripheral portion, wherein the second peripheral portion is laterally displaced from the first peripheral portion, and the central portion is downset from the second peripheral portion.
9. The leadframe of claim 6, wherein the central portion of the die pad has a perimeter and includes one or more protrusions within said perimeter.
10. A package for an electronic device comprising: a metal die pad and a plurality of metal leads adjacent to said die pad; wherein said die pad includes a central portion and a first peripheral portion adjacent to the central portion; wherein first peripheral portion has a first surface in a first horizontal plane and an opposite second surface, and the central portion has a third surface in a second horizontal plane and an opposite fourth surface, wherein the first horizontal plane is parallel to the second horizontal plane, and the first surface and the second surface are a vertical distance from the third and forth surfaces; an electronic device on the third surface of the die pad; a plurality of conductive connectors each connecting the electronic device to a different lead a connective conductor connecting the first surface of the die pad the electronic device; and an encapsulant material, wherein the encapsulant material covers the first surface, second surface, and third surfaces of the die pad, but does not significantly cover the fourth surface of the die pad.
11. The package of claim 10, wherein said first peripheral portion surrounds the central portion.
12. The package of Claim 10, wherein said die pad further comprises a second peripheral portion adjacent to the central portion of the die pad and a lateral distance from the first peripheral portion; wherein said second peripheral portion has a fifth surface in the first horizontal plane and an opposite sixth surface, and the fifth surface and the sixth surface are a vertical distance from the third and fourth surfaces; and encapsulant material covers the fifth and sixth surfaces.
13. The package of claim 10, wherein a plurality of conductive connectors connect the first surface of the die pad and the electronic device.
14. The package of claim 12, wherein a conductive connector connects the fifth surface to the electronic device.
15. The package of claim 10, wherein said central portion of the die pad has a perimeter and includes one or more protrusions within said perimeter, wherein each such protrusion has a seventh surface in the first horizontal plane.
16. A package for an electronic device comprising: a die pad and a plurality of leads adjacent to the die pad; wherein said die pad includes a central portion and a first peripheral portion adjacent to the central portion, wherein the central portion includes a first surface and an opposite second surface, and the central portion is downset from the peripheral portion and the leads; an electronic device on the first surface of the central portion of the die pad; a plurality of conductive connectors each connecting the electronic device to a different lead; a connective conductor connecting the peripheral portion of the die pad the electronic device; and
an encapsulant material, wherein the encapsulant material surrounds the peripheral portion of the die pad and covers the first surface of the pad, but the encapsulant material does not significantly cover the second surface of the die pad.
17. The package of claim 16, wherein the first peripheral portion of the die pad surrounds the central portion of the die pad.
18. The package of claim 16, wherein the die pad further comprises a second peripheral portion that is laterally displaced from the first peripheral portion, and the central portion is downset from the second peripheral portion.
19. The package of claim 16, wherein the central portion of the die pad has a perimeter and includes one or more protrusions within and adjacent to said perimeter, and encapsulant material fills an underside of each said protrusion.
20. The package of claim 19, wherein a plurality of conductive connectors connect the first peripheral portion of the die pad to the electronic device.
21. A package for an electronic device comprising: a metal die pad having a first surface and a second surface opposite said first surface; an electronic device having a first surface on the first surface of the die pad and an opposite second surface, wherein there is a first vertical distance between the first surface of the die pad and the second surface of the electronic device; a plurality of metal leads; a plurality of first conductive connectors, wherein each of said first conductive connectors connect a conductive pad on the second surface of the electronic device to a lead; a second conductive connector that connects the electronic device to a first peripheral portion of the die pad, wherein the first peripheral portion of the die pad is a second vertical distance from the second surface of the electronic device, and said second vertical distance is less than said first vertical distance; and
an encapsulant material, wherein the encapsulant material covers the first surface of the die pad and surrounds the first peripheral portion of the die pad but does not cover at least some portion of the second surface of the die pad.
22. A method of making a leadframe comprising: providing a metal sheet; patterning the metal sheet to form a die pad and leads adjacent to the die pad, wherein the die pad includes a central portion and a peripheral portion that is adjacent to and connected to the central portion of the die pad, and wherein one or more open spaces are between the central area of the die pad and the peripheral portion of the die pad; downsetting the central portion of the die pad from the leads and the peripheral portion of the die pad.
23. The method of claim 22, wherein patterning the metal sheet further comprises forming a plurality of said peripheral portions, and downsetting the central portion of the die pad from each of said peripheral portions.
24. The method of claim 22, further comprising forming one or more protrusions in the central area of the die pad near a perimeter of the central area of the die pad.
25. The method of claim 22, wherein downsetting includes downsetting the peripheral portion a first vertical distance below the leads and downsetting the central portion of the die pad a vertical distance below the peripheral portion.
26. A method of making a package for an electronic device comprising: providing a leadframe, wherein said leadframe includes a die pad and a plurality of leads adjacent to the die pad; wherein said die pad includes a central portion and a first peripheral portion adjacent to the central portion;
wherein the central portion includes a first surface and an opposite second surface, and the central portion is downset from the peripheral portion and the leads; placing an electronic device on the first surface of the central portion of the die pad; providing a plurality of conductive connectors and connecting each such connector between the electronic device and a lead; providing a connective conductor and connecting the conductive connector between the peripheral portion of the die pad the electronic device; and applying an encapsulant material onto the electronic device and leadframe, wherein the encapsulant material surrounds the peripheral portion of the die pad and covers the connectors, the device, and the first surface of the central die pad, but the encapsulant material does not significantly cover the second surface of the central portion of the die pad.
27. The method of claim 26, wherein the peripheral portion of the die pad surrounds the central portion.
28. The method of claim 26, wherein the central portion of the die pad has a perimeter and one or more protrusions adjacent to said perimeter.
29. The method of claim 26, wherein the die pad has a second peripheral portion laterally displaced from the first peripheral portion, and the central portion of the die pad is downset from said second peripheral portion.
AMENDED CLAIMS
[received by the International Bureau on 11 December 2000 (11.12.00); original claims 1-29 replaced by new claims 1-20; (5 pages)]
1. A leadframe comprising: a die pad and a plurality of leads adjacent to the die pad; wherein said die pad includes a central portion for placement of an electronic device thereon and a first peripheral portion adjacent to, surrounding, and integrally connected to the central portion, and the central portion of the die pad is downset from the first peripheral portion and the leads.
2. The leadframe of claim 1, wherein the central portion of the die pad has a rectangular perimeter.
3. The leadframe of claim 1 or 2, wherein a plurality of sloped connectors integrally connect the first peripheral portion to the central portion of the die pad.
4. A package for an electronic device comprising: a die pad and a plurality of leads adjacent to the die pad; wherein said die pad includes a central portion and a first peripheral portion adjacent to, surrounding, and integrally connected to the central portion, and wherein the central portion includes a first surface and an opposite second surface, and the central portion is downset from the first peripheral portion and the leads; an electronic device on the first surface of the central portion of the die pad; a plurality of conductive connectors each connecting the electronic device to a different lead; a conductive connector connecting the first peripheral portion of the die pad to the electronic device; and an encapsulant material, wherein the encapsulant material surrounds the first peripheral portion of the die pad and covers the first surface of the pad, but the encapsulant material does not significantly cover the second surface of the central portion of the die pad.
5. The package of claim 4, wherein the central portion of the die pad has a rectangular perimeter.
6. The package of claim 4 or 5, wherein a plurality of sloped connectors integrally connect the first peripheral portion to the central portion of the die pad.
7. A leadframe comprising: a die pad and a plurality of leads adjacent to the die pad, wherein said die pad includes a rectangular central portion for placement of an electronic device thereon and at least a pair of opposed peripheral portions adjacent to the central portion, the central portion of the die pad is downset from the peripheral portions and the leads, and opposed ends of each peripheral portion are each integrally connected by a sloped connector to the central portion.
8. The leadframe of claim 7, wherein the pair of opposed peripheral portions are respectively adjacent to first and second parallel sides of the central portion, and the sloped connectors of each peripheral portion integrally connect to the central portion at adjacent corners of the central portion.
9. The leadframe of claim 7, wherein the rectangular central portion includes a pair of opposed protrusions respectively at third and fourth parallel sides of the rectangular central portion.
10. A package for an electronic device comprising: a die pad and a plurality of leads adjacent to the die pad, wherein said die pad includes a rectangular central portion having a first surface and an opposite second surface, and at least a pair of opposed peripheral portions adjacent to the central portion, and
wherein the central portion of the die pad is downset from the peripheral portions and the leads, and opposed ends of each peripheral portion are each integrally connected by a sloped connector to the central portion; an electronic device on the central portion of the die pad between said peripheral portions; a plurality of conductive connectors each connecting the electronic device to a different lead; a conductive connector connecting at least one of the peripheral portions of the die pad to the electronic device; and an encapsulant material surrounding the peripheral portions of the die pad and covering the electronic device, the conductive connectors, and the first surface of the central portion of the die pad, wherein the encapsulant material does not significantly cover the second surface of the central portion of the die pad.
11. The package of claim 10, wherein the pair of opposed peripheral portions are respectively adjacent to first and second parallel sides of the rectangular central portion, and the sloped connectors of each peripheral portion integrally connect to the central portion at corners of the rectangular central portion.
12. The package of claim 10, wherein the rectangular central portion includes a pair of opposed protrusions respectively at third and fourth parallel sides of the rectangular central portion, the electronic device is between said protrusions, and the encapsulant material surrounds said protrusions.
13. A method of making a leadframe comprising: providing a metal sheet; patterning the metal sheet to form a die pad and leads adjacent to the die pad, wherein the die pad includes a central portion and a peripheral portion that is adjacent to and connected to the central portion of the die pad, and wherein one or more open spaces are between the central area of the die pad and the peripheral portion of the die pad;
downsetting the central portion of the die pad from the leads and the peripheral portion of the die pad.
14. The method of claim 22, wherein patterning the metal sheet further comprises forming a plurality of said peripheral portions, and downsetting the central portion of the die pad from each of said peripheral portions.
15. The method of claim 22, further comprising forming one or more protrusions in the central area of the die pad near a perimeter of the central area of the die pad.
16. The method of claim 22, wherein downsetting includes downsetting the peripheral portion a first vertical distance below the leads and downsetting the central portion of the die pad a vertical distance below the peripheral portion.
17. A method of making a package for an electronic device comprising: providing a leadframe, wherein said leadframe includes a die pad and a plurality of leads adjacent to the die pad; wherein said die pad includes a central portion and a first peripheral portion adjacent to the central portion; wherein the central portion includes a first surface and an opposite second surface, and the central portion is downset from the peripheral portion and the leads; placing an electronic device on the first surface of the central portion of the die pad; providing a plurality of conductive connectors and connecting each such connector between the electronic device and a lead; providing a connective conductor and connecting the conductive connector between the peripheral portion of the die pad the electronic device; and applying an encapsulant material onto the electronic device and leadframe, wherein the encapsulant material surrounds the peripheral portion of the die pad and covers the connectors, the device, and the first surface of the central die pad, but the encapsulant material does not significantly cover the second surface of the central portion of the die pad.
18. The method of claim 26, wherein the peripheral portion of the die pad surrounds the 7central portion.
19. The method of claim 26, wherein the central portion of the die pad has a perimeter and one or more protrusions adjacent to said perimeter.
20. The method of claim 26, wherein the die pad has a second peripheral portion laterally displaced from the first peripheral portion, and the central portion of the die pad is downset from said second peripheral portion.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US36559699A | 1999-07-30 | 1999-07-30 | |
| US09/365,596 | 1999-07-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2001009953A1 true WO2001009953A1 (en) | 2001-02-08 |
Family
ID=23439524
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2000/020898 WO2001009953A1 (en) | 1999-07-30 | 2000-07-31 | Lead frame with downset die pad |
Country Status (1)
| Country | Link |
|---|---|
| WO (1) | WO2001009953A1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2004036646A1 (en) * | 2002-10-09 | 2004-04-29 | Micronas Gmbh | Support device for monolithically integrated circuits |
| US7064420B2 (en) | 2002-09-30 | 2006-06-20 | St Assembly Test Services Ltd. | Integrated circuit leadframe with ground plane |
| US20110089556A1 (en) * | 2009-10-19 | 2011-04-21 | National Semiconductor Corporation | Leadframe packages having enhanced ground-bond reliability |
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| JPS63169753A (en) * | 1987-01-07 | 1988-07-13 | Nec Yamagata Ltd | Lead frame |
| JPS63308359A (en) * | 1987-06-10 | 1988-12-15 | Mitsui Haitetsuku:Kk | Manufacture of lead frame |
| JPH05235233A (en) * | 1992-02-26 | 1993-09-10 | Toshiba Corp | Lead frame |
| US5479050A (en) * | 1990-10-18 | 1995-12-26 | Texas Instruments Incorporated | Leadframe with pedestal |
| US5789806A (en) * | 1995-08-02 | 1998-08-04 | National Semiconductor Corporation | Leadframe including bendable support arms for downsetting a die attach pad |
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| JPS63169753A (en) * | 1987-01-07 | 1988-07-13 | Nec Yamagata Ltd | Lead frame |
| JPS63308359A (en) * | 1987-06-10 | 1988-12-15 | Mitsui Haitetsuku:Kk | Manufacture of lead frame |
| US5479050A (en) * | 1990-10-18 | 1995-12-26 | Texas Instruments Incorporated | Leadframe with pedestal |
| JPH05235233A (en) * | 1992-02-26 | 1993-09-10 | Toshiba Corp | Lead frame |
| US5789806A (en) * | 1995-08-02 | 1998-08-04 | National Semiconductor Corporation | Leadframe including bendable support arms for downsetting a die attach pad |
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| PATENT ABSTRACTS OF JAPAN vol. 013, no. 147 (E - 741) 11 April 1989 (1989-04-11) * |
| PATENT ABSTRACTS OF JAPAN vol. 017, no. 687 (E - 1478) 16 December 1993 (1993-12-16) * |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7064420B2 (en) | 2002-09-30 | 2006-06-20 | St Assembly Test Services Ltd. | Integrated circuit leadframe with ground plane |
| SG132500A1 (en) * | 2002-09-30 | 2007-06-28 | Stats Chippac Ltd | Integrated circuit leadframe with ground plane |
| WO2004036646A1 (en) * | 2002-10-09 | 2004-04-29 | Micronas Gmbh | Support device for monolithically integrated circuits |
| KR101003061B1 (en) | 2002-10-09 | 2010-12-22 | 미크로나스 게엠베하 | Support device for monolithically integrated circuits |
| US20110089556A1 (en) * | 2009-10-19 | 2011-04-21 | National Semiconductor Corporation | Leadframe packages having enhanced ground-bond reliability |
| US8093707B2 (en) * | 2009-10-19 | 2012-01-10 | National Semiconductor Corporation | Leadframe packages having enhanced ground-bond reliability |
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