JP2004535065A - 多孔質材料上のＳｉＣ：Ｈ蒸着によって改良された金属バリア挙動 - Google Patents

多孔質材料上のＳｉＣ：Ｈ蒸着によって改良された金属バリア挙動 Download PDF

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Publication number
JP2004535065A
JP2004535065A JP2003511305A JP2003511305A JP2004535065A JP 2004535065 A JP2004535065 A JP 2004535065A JP 2003511305 A JP2003511305 A JP 2003511305A JP 2003511305 A JP2003511305 A JP 2003511305A JP 2004535065 A JP2004535065 A JP 2004535065A
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Prior art keywords
value
atomic
dielectric layer
sealing
integrated circuit
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JP2003511305A
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Japanese (ja)
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JP2004535065A5 (enExample
Inventor
メイネン、ヘルマン
ウィードナー、ウィリアム・ケネス
イアコピ、フランチェスカ
マルウィトル、ステファン
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Dow Silicones Corp
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Dow Corning Corp
Dow Silicones Corp
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Publication of JP2004535065A publication Critical patent/JP2004535065A/ja
Publication of JP2004535065A5 publication Critical patent/JP2004535065A5/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Laminated Bodies (AREA)
  • Formation Of Insulating Films (AREA)
JP2003511305A 2001-07-02 2002-06-25 多孔質材料上のＳｉＣ：Ｈ蒸着によって改良された金属バリア挙動 Pending JP2004535065A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US30246901P 2001-07-02 2001-07-02
PCT/US2002/020704 WO2003005438A2 (en) 2001-07-02 2002-06-25 Improved metal barrier behavior by sic:h deposition on porous materials

Publications (2)

Publication Number Publication Date
JP2004535065A true JP2004535065A (ja) 2004-11-18
JP2004535065A5 JP2004535065A5 (enExample) 2006-01-05

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JP2003511305A Pending JP2004535065A (ja) 2001-07-02 2002-06-25 多孔質材料上のＳｉＣ：Ｈ蒸着によって改良された金属バリア挙動

Country Status (5)

Country Link
US (1) US6541842B2 (enExample)
JP (1) JP2004535065A (enExample)
KR (1) KR100847926B1 (enExample)
CN (1) CN1596466A (enExample)
WO (1) WO2003005438A2 (enExample)

Cited By (7)

* Cited by examiner, † Cited by third party
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JP2006190872A (ja) * 2005-01-07 2006-07-20 Fujitsu Ltd 半導体装置の製造方法
JP2006216541A (ja) * 2005-01-21 2006-08-17 Internatl Business Mach Corp <Ibm> 誘電体材料、相互接続構造、電子構造、電子センシング構造および該製作方法（改良された靭性および改良されたＳｉ−Ｃ結合を有するＳｉＣＯＨ誘電体材料、該誘電体材料を含む半導体デバイスおよび該誘電体材料の製作方法）
JP2007088017A (ja) * 2005-09-20 2007-04-05 National Institute Of Advanced Industrial & Technology 有機絶縁膜とその作製方法，及び有機絶縁膜を用いた半導体装置
JP2008520100A (ja) * 2004-11-12 2008-06-12 アクセリス テクノロジーズ インコーポレーテッド 多孔性低ｋ誘電体フィルムの紫外線に補助された細孔シーリング
JP2010073933A (ja) * 2008-09-19 2010-04-02 Fujitsu Microelectronics Ltd 半導体装置の製造方法及び半導体装置
JP2012506147A (ja) * 2008-10-20 2012-03-08 ダウ コーニング コーポレーション Ｃｖｄ前駆体
JP2020518725A (ja) * 2017-06-02 2020-06-25 ノースロップ グラマン システムズ コーポレイションＮｏｒｔｈｒｏｐ Ｇｒｕｍｍａｎ Ｓｙｓｔｅｍｓ Ｃｏｒｐｏｒａｔｉｏｎ 超伝導体相互接続のための堆積方法

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Cited By (9)

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Publication number Priority date Publication date Assignee Title
JP2008520100A (ja) * 2004-11-12 2008-06-12 アクセリス テクノロジーズ インコーポレーテッド 多孔性低ｋ誘電体フィルムの紫外線に補助された細孔シーリング
JP2006190872A (ja) * 2005-01-07 2006-07-20 Fujitsu Ltd 半導体装置の製造方法
JP2006216541A (ja) * 2005-01-21 2006-08-17 Internatl Business Mach Corp <Ibm> 誘電体材料、相互接続構造、電子構造、電子センシング構造および該製作方法（改良された靭性および改良されたＳｉ−Ｃ結合を有するＳｉＣＯＨ誘電体材料、該誘電体材料を含む半導体デバイスおよび該誘電体材料の製作方法）
JP2007088017A (ja) * 2005-09-20 2007-04-05 National Institute Of Advanced Industrial & Technology 有機絶縁膜とその作製方法，及び有機絶縁膜を用いた半導体装置
JP2010073933A (ja) * 2008-09-19 2010-04-02 Fujitsu Microelectronics Ltd 半導体装置の製造方法及び半導体装置
JP2012506147A (ja) * 2008-10-20 2012-03-08 ダウ コーニング コーポレーション Ｃｖｄ前駆体
JP2014017502A (ja) * 2008-10-20 2014-01-30 Dow Corning Corp Ｃｖｄ前駆体
JP2020518725A (ja) * 2017-06-02 2020-06-25 ノースロップ グラマン システムズ コーポレイションＮｏｒｔｈｒｏｐ Ｇｒｕｍｍａｎ Ｓｙｓｔｅｍｓ Ｃｏｒｐｏｒａｔｉｏｎ 超伝導体相互接続のための堆積方法
JP7038139B2 (ja) 2017-06-02 2022-03-17 ノースロップ グラマン システムズ コーポレーション 超伝導体相互接続のための堆積方法

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US20030001282A1 (en) 2003-01-02
WO2003005438A2 (en) 2003-01-16
US6541842B2 (en) 2003-04-01
CN1596466A (zh) 2005-03-16
KR100847926B1 (ko) 2008-07-22
WO2003005438A3 (en) 2003-05-01
KR20040032119A (ko) 2004-04-14

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