JP2003016793A - 半導体記憶装置用アドレス回路及びｘデコーダと半導体記憶装置 - Google Patents

半導体記憶装置用アドレス回路及びｘデコーダと半導体記憶装置

Info

Publication number
JP2003016793A
JP2003016793A JP2002127331A JP2002127331A JP2003016793A JP 2003016793 A JP2003016793 A JP 2003016793A JP 2002127331 A JP2002127331 A JP 2002127331A JP 2002127331 A JP2002127331 A JP 2002127331A JP 2003016793 A JP2003016793 A JP 2003016793A
Authority
JP
Japan
Prior art keywords
word line
gate
transistor
boost
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002127331A
Other languages
English (en)
Japanese (ja)
Inventor
Takao Akaogi
隆男 赤荻
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of JP2003016793A publication Critical patent/JP2003016793A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits

Landscapes

  • Read Only Memory (AREA)
  • Logic Circuits (AREA)
  • Dram (AREA)
JP2002127331A 2001-04-30 2002-04-26 半導体記憶装置用アドレス回路及びｘデコーダと半導体記憶装置 Pending JP2003016793A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/846,099 US6646950B2 (en) 2001-04-30 2001-04-30 High speed decoder for flash memory
US09/846099 2001-04-30

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007213161A Division JP2007323808A (ja) 2001-04-30 2007-08-17 半導体記憶装置用ｘデコーダ

Publications (1)

Publication Number Publication Date
JP2003016793A true JP2003016793A (ja) 2003-01-17

Family

ID=25296936

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2002127331A Pending JP2003016793A (ja) 2001-04-30 2002-04-26 半導体記憶装置用アドレス回路及びｘデコーダと半導体記憶装置
JP2007213161A Pending JP2007323808A (ja) 2001-04-30 2007-08-17 半導体記憶装置用ｘデコーダ

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2007213161A Pending JP2007323808A (ja) 2001-04-30 2007-08-17 半導体記憶装置用ｘデコーダ

Country Status (6)

Country Link
US (1) US6646950B2 (zh)
EP (1) EP1255255B1 (zh)
JP (2) JP2003016793A (zh)
KR (1) KR100758885B1 (zh)
DE (1) DE60227597D1 (zh)
TW (1) TW550577B (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006090442A1 (ja) * 2005-02-23 2006-08-31 Spansion Llc 半導体装置およびその制御方法
JP2008532201A (ja) * 2005-03-08 2008-08-14 スパンジョン・リミテッド・ライアビリティ・カンパニー メモリデバイス用デコーダ

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1351397A3 (en) 2001-11-27 2005-03-02 Texas Instruments Incorporated All-digital frequency synthesis with capacitive re-introduction of dithered tuning information
US6809960B2 (en) 2002-08-26 2004-10-26 Micron Technology, Inc. High speed low voltage driver
US6888754B2 (en) * 2003-01-31 2005-05-03 Taiwan Semiconductor Manufacturing Company Nonvolatile semiconductor memory array with byte-program, byte-erase, and byte-read capabilities
US6778437B1 (en) * 2003-08-07 2004-08-17 Advanced Micro Devices, Inc. Memory circuit for providing word line redundancy in a memory sector
JP2005302139A (ja) * 2004-04-09 2005-10-27 Nec Electronics Corp 半導体記憶装置
US7002492B2 (en) * 2004-07-07 2006-02-21 Seagate Technology Llc High rate running digital sum-restricted code
US7428172B2 (en) * 2006-07-17 2008-09-23 Freescale Semiconductor, Inc. Concurrent programming and program verification of floating gate transistor
US7583554B2 (en) * 2007-03-02 2009-09-01 Freescale Semiconductor, Inc. Integrated circuit fuse array
US7787323B2 (en) * 2007-04-27 2010-08-31 Freescale Semiconductor, Inc. Level detect circuit
KR101309113B1 (ko) 2007-08-23 2013-09-16 삼성전자주식회사 리드 와일 라이트 동작 시 발생하는 리드 전압의 변동을최소화할 수 있는 노아 플래시 메모리 장치 및 방법
US7672163B2 (en) * 2007-09-14 2010-03-02 Sandisk Corporation Control gate line architecture
JP5398520B2 (ja) * 2009-12-25 2014-01-29 株式会社東芝 ワード線駆動回路

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6129488A (ja) * 1984-07-20 1986-02-10 Hitachi Micro Comput Eng Ltd ダイナミツク型ｒａｍ
JPH0194591A (ja) * 1987-10-06 1989-04-13 Fujitsu Ltd 半導体メモリ
JPH05120881A (ja) 1991-10-24 1993-05-18 Mitsubishi Electric Corp 半導体記憶装置
JPH0745074A (ja) 1993-07-29 1995-02-14 Mitsubishi Electric Corp 半導体記憶装置
KR960011206B1 (ko) 1993-11-09 1996-08-21 삼성전자 주식회사 반도체메모리장치의 워드라인구동회로
JP3478953B2 (ja) * 1997-09-03 2003-12-15 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置
JPH11317074A (ja) * 1998-04-30 1999-11-16 Nec Corp ワード線制御回路
DE19841445C2 (de) * 1998-09-10 2002-04-25 Infineon Technologies Ag Halbleiter-Schaltungsanordnung
US6026047A (en) * 1998-11-03 2000-02-15 Samsung Electronics Co., Ltd. Integrated circuit memory device with hierarchical work line structure
WO2000029919A1 (en) * 1998-11-18 2000-05-25 Macronix International Co., Ltd. Rapid on chip voltage generation for low power integrated circuits
US6255900B1 (en) * 1998-11-18 2001-07-03 Macronix International Co., Ltd. Rapid on chip voltage generation for low power integrated circuits
KR20000045361A (ko) * 1998-12-30 2000-07-15 김영환 워드라인 구동장치
JP3940513B2 (ja) * 1999-01-11 2007-07-04 株式会社東芝 半導体記憶装置
JP3296319B2 (ja) * 1999-03-02 2002-06-24 日本電気株式会社 ワード線駆動回路及び半導体記憶装置
KR100381962B1 (ko) * 2000-08-07 2003-05-01 삼성전자주식회사 비휘발성 메모리 장치의 로우 디코더
US6347052B1 (en) * 2000-08-31 2002-02-12 Advanced Micro Devices Inc. Word line decoding architecture in a flash memory

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006090442A1 (ja) * 2005-02-23 2006-08-31 Spansion Llc 半導体装置およびその制御方法
US7466605B2 (en) 2005-02-23 2008-12-16 Spansion Llc Semiconductor device and control method therefor
JP2008532201A (ja) * 2005-03-08 2008-08-14 スパンジョン・リミテッド・ライアビリティ・カンパニー メモリデバイス用デコーダ

Also Published As

Publication number Publication date
EP1255255A2 (en) 2002-11-06
JP2007323808A (ja) 2007-12-13
US6646950B2 (en) 2003-11-11
KR20030009101A (ko) 2003-01-29
KR100758885B1 (ko) 2007-09-19
US20020159296A1 (en) 2002-10-31
EP1255255B1 (en) 2008-07-16
DE60227597D1 (zh) 2008-08-28
TW550577B (en) 2003-09-01
EP1255255A3 (en) 2004-06-02

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