JP2002530778A5 - - Google Patents

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Publication number
JP2002530778A5
JP2002530778A5 JP2000584397A JP2000584397A JP2002530778A5 JP 2002530778 A5 JP2002530778 A5 JP 2002530778A5 JP 2000584397 A JP2000584397 A JP 2000584397A JP 2000584397 A JP2000584397 A JP 2000584397A JP 2002530778 A5 JP2002530778 A5 JP 2002530778A5
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JP
Japan
Prior art keywords
memory access
direct memory
physical
virtual
channels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000584397A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002530778A (ja
JP4562107B2 (ja
Filing date
Publication date
Priority claimed from US09/198,797 external-priority patent/US6260081B1/en
Application filed filed Critical
Publication of JP2002530778A publication Critical patent/JP2002530778A/ja
Publication of JP2002530778A5 publication Critical patent/JP2002530778A5/ja
Application granted granted Critical
Publication of JP4562107B2 publication Critical patent/JP4562107B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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JP2000584397A 1998-11-24 1999-06-29 複数の仮想ダイレクトメモリアクセスチャネルをサポートするためのダイレクトメモリアクセスエンジン Expired - Lifetime JP4562107B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/198,797 1998-11-24
US09/198,797 US6260081B1 (en) 1998-11-24 1998-11-24 Direct memory access engine for supporting multiple virtual direct memory access channels
PCT/US1999/014797 WO2000031648A1 (en) 1998-11-24 1999-06-29 A direct memory access engine for supporting multiple virtual direct memory access channels

Publications (3)

Publication Number Publication Date
JP2002530778A JP2002530778A (ja) 2002-09-17
JP2002530778A5 true JP2002530778A5 (https=) 2007-02-01
JP4562107B2 JP4562107B2 (ja) 2010-10-13

Family

ID=22734891

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000584397A Expired - Lifetime JP4562107B2 (ja) 1998-11-24 1999-06-29 複数の仮想ダイレクトメモリアクセスチャネルをサポートするためのダイレクトメモリアクセスエンジン

Country Status (6)

Country Link
US (1) US6260081B1 (https=)
EP (1) EP1131732B1 (https=)
JP (1) JP4562107B2 (https=)
KR (1) KR100615659B1 (https=)
DE (1) DE69903061T2 (https=)
WO (1) WO2000031648A1 (https=)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6763448B1 (en) * 1999-02-16 2004-07-13 Renesas Technology Corp. Microcomputer and microcomputer system
US6622181B1 (en) * 1999-07-15 2003-09-16 Texas Instruments Incorporated Timing window elimination in self-modifying direct memory access processors
US6408345B1 (en) * 1999-07-15 2002-06-18 Texas Instruments Incorporated Superscalar memory transfer controller in multilevel memory organization
US6785743B1 (en) * 2000-03-22 2004-08-31 University Of Washington Template data transfer coprocessor
US7075565B1 (en) * 2000-06-14 2006-07-11 Landrex Technologies Co., Ltd. Optical inspection system
US6874039B2 (en) * 2000-09-08 2005-03-29 Intel Corporation Method and apparatus for distributed direct memory access for systems on chip
KR100403620B1 (ko) 2001-02-28 2003-10-30 삼성전자주식회사 채널 활용율을 높이는 통신 시스템 및 그 방법
US6839797B2 (en) 2001-12-21 2005-01-04 Agere Systems, Inc. Multi-bank scheduling to improve performance on tree accesses in a DRAM based random access memory subsystem
EP1341092A1 (en) * 2002-03-01 2003-09-03 Motorola, Inc. Method and arrangement for virtual direct memory access
US6941390B2 (en) * 2002-11-07 2005-09-06 National Instruments Corporation DMA device configured to configure DMA resources as multiple virtual DMA channels for use by I/O resources
JP2005221731A (ja) * 2004-02-05 2005-08-18 Konica Minolta Photo Imaging Inc 撮像装置
US20050262275A1 (en) * 2004-05-19 2005-11-24 Gil Drori Method and apparatus for accessing a multi ordered memory array
CN100432968C (zh) * 2004-07-09 2008-11-12 上海奇码数字信息有限公司 存储器直接存取装置及其数据传输方法
JP4499008B2 (ja) * 2005-09-15 2010-07-07 富士通マイクロエレクトロニクス株式会社 Ｄｍａ転送システム
KR100891508B1 (ko) * 2007-03-16 2009-04-06 삼성전자주식회사 가상 디엠에이를 포함하는 시스템
US20080295097A1 (en) * 2007-05-24 2008-11-27 Advanced Micro Devices, Inc. Techniques for sharing resources among multiple devices in a processor system
US8417842B2 (en) * 2008-05-16 2013-04-09 Freescale Semiconductor Inc. Virtual direct memory access (DMA) channel technique with multiple engines for DMA controller
US7979601B2 (en) * 2008-08-05 2011-07-12 Standard Microsystems Corporation External direct memory access of embedded controller memory
KR20160007859A (ko) * 2014-07-04 2016-01-21 삼성전자주식회사 컴퓨팅 시스템 및 이의 동작 방법.
KR102254676B1 (ko) 2014-10-31 2021-05-21 삼성전자주식회사 이미지를 실시간으로 처리할 수 있는 이미지 처리 회로와 이를 포함하는 장치들
KR102391518B1 (ko) 2015-09-15 2022-04-27 삼성전자주식회사 기준 전류 발생 회로와 이를 구비하는 반도체 집적 회로
WO2017151588A2 (en) * 2016-02-29 2017-09-08 Renesas Electronics America Inc. A system and method for programming data transfer within a microcontroller
US10037150B2 (en) 2016-07-15 2018-07-31 Advanced Micro Devices, Inc. Memory controller with virtual controller mode

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5898893A (ja) * 1981-12-09 1983-06-11 Toshiba Corp 情報処理装置
JPS6249552A (ja) * 1985-08-29 1987-03-04 Toshiba Corp Ｄｍａ装置
US4901234A (en) * 1987-03-27 1990-02-13 International Business Machines Corporation Computer system having programmable DMA control
JPH081631B2 (ja) * 1987-04-30 1996-01-10 ジーイー横河メディカルシステム株式会社 Ｄｍａ制御装置
US5392404A (en) * 1992-06-22 1995-02-21 International Business Machines Corp. Bus control preemption logic
US6026443A (en) * 1992-12-22 2000-02-15 Sun Microsystems, Inc. Multi-virtual DMA channels, multi-bandwidth groups, host based cellification and reassembly, and asynchronous transfer mode network interface
JPH06259341A (ja) * 1993-03-03 1994-09-16 Mitsubishi Electric Corp 論理チャネルリセット装置及び回線情報表示装置
JPH0744486A (ja) * 1993-08-02 1995-02-14 Hitachi Ltd 入出力制御装置
JPH0883233A (ja) * 1994-09-14 1996-03-26 Fujitsu Ltd チャネル制御装置
US5619727A (en) 1995-03-08 1997-04-08 United Microelectronics Corp. Apparatus for a multiple channel direct memory access utilizing a virtual array technique
JPH08340349A (ja) * 1995-06-12 1996-12-24 Fujitsu Ltd 接続制御方法及びその方法を用いた通信処理装置
US5751951A (en) * 1995-10-30 1998-05-12 Mitsubishi Electric Information Technology Center America, Inc. Network interface
US5875352A (en) * 1995-11-03 1999-02-23 Sun Microsystems, Inc. Method and apparatus for multiple channel direct memory access control
EP0803821A3 (en) 1996-04-26 1998-01-28 Texas Instruments Incorporated DMA channel assignment in a data packet transfer device
US5875289A (en) * 1996-06-28 1999-02-23 Microsoft Corporation Method and system for simulating auto-init mode DMA data transfers
JPH1093580A (ja) 1996-09-18 1998-04-10 Hitachi Ltd データ処理装置の制御方法およびデータ処理装置
US5832246A (en) * 1996-12-03 1998-11-03 Toshiba America Information Systems, Inc. Virtualization of the ISA bus on PCI with the existence of a PCI to ISA bridge

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