JP2002319663A5 - - Google Patents
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- Publication number
- JP2002319663A5 JP2002319663A5 JP2001122882A JP2001122882A JP2002319663A5 JP 2002319663 A5 JP2002319663 A5 JP 2002319663A5 JP 2001122882 A JP2001122882 A JP 2001122882A JP 2001122882 A JP2001122882 A JP 2001122882A JP 2002319663 A5 JP2002319663 A5 JP 2002319663A5
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- memory device
- semiconductor memory
- spaced apart
- magnetoresistive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims 27
- 239000000758 substrate Substances 0.000 claims 9
- 230000000694 effects Effects 0.000 claims 7
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001122882A JP4488645B2 (ja) | 2001-04-20 | 2001-04-20 | 磁気記憶装置 |
| TW091107611A TW543086B (en) | 2001-04-20 | 2002-04-15 | Semiconductor memory device and method of fabricating the same |
| KR10-2002-0021257A KR100470848B1 (ko) | 2001-04-20 | 2002-04-18 | 반도체 기억 장치 및 그 제조 방법 |
| CNB021161240A CN1187824C (zh) | 2001-04-20 | 2002-04-19 | 半导体存储装置及其制造方法 |
| US10/125,485 US6617658B2 (en) | 2001-04-20 | 2002-04-19 | Semiconductor memory device including magneto resistive element |
| US10/615,188 US6764865B2 (en) | 2001-04-20 | 2003-07-09 | Semiconductor memory device including magneto resistive element and method of fabricating the same |
| US10/866,129 US6967864B2 (en) | 2001-04-20 | 2004-06-14 | Semiconductor memory device including magneto resistive element and method of fabricating the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001122882A JP4488645B2 (ja) | 2001-04-20 | 2001-04-20 | 磁気記憶装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002319663A JP2002319663A (ja) | 2002-10-31 |
| JP2002319663A5 true JP2002319663A5 (https=) | 2005-08-25 |
| JP4488645B2 JP4488645B2 (ja) | 2010-06-23 |
Family
ID=18972525
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001122882A Expired - Fee Related JP4488645B2 (ja) | 2001-04-20 | 2001-04-20 | 磁気記憶装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (3) | US6617658B2 (https=) |
| JP (1) | JP4488645B2 (https=) |
| KR (1) | KR100470848B1 (https=) |
| CN (1) | CN1187824C (https=) |
| TW (1) | TW543086B (https=) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6689661B2 (en) * | 2001-04-10 | 2004-02-10 | Micron Technology, Inc. | Method for forming minimally spaced MRAM structures |
| JP3884312B2 (ja) * | 2002-03-28 | 2007-02-21 | 株式会社東芝 | 磁気記憶装置 |
| US6897532B1 (en) * | 2002-04-15 | 2005-05-24 | Cypress Semiconductor Corp. | Magnetic tunneling junction configuration and a method for making the same |
| US6828639B2 (en) * | 2002-07-17 | 2004-12-07 | Micron Technology, Inc. | Process flow for building MRAM structures |
| JP4509467B2 (ja) * | 2002-11-08 | 2010-07-21 | シャープ株式会社 | 不揮発可変抵抗素子、及び記憶装置 |
| US7221584B2 (en) * | 2004-08-13 | 2007-05-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | MRAM cell having shared configuration |
| US7319262B2 (en) * | 2004-08-13 | 2008-01-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | MRAM over sloped pillar |
| US7088612B2 (en) * | 2004-08-20 | 2006-08-08 | Infineon Technologies Ag | MRAM with vertical storage element in two layer-arrangement and field sensor |
| US7416905B2 (en) * | 2005-10-17 | 2008-08-26 | International Busniess Machines Corporation | Method of fabricating a magnetic shift register |
| US8679860B1 (en) * | 2006-08-07 | 2014-03-25 | Sandia Corporation | Lateral electrodeposition of compositionally modulated metal layers |
| JP4343940B2 (ja) * | 2006-10-31 | 2009-10-14 | Tdk株式会社 | 磁気抵抗効果素子、薄膜磁気ヘッド、ヘッドジンバルアセンブリ、ハードディスク装置および磁気抵抗効果素子の製造方法 |
| US7919794B2 (en) * | 2008-01-08 | 2011-04-05 | Qualcomm, Incorporated | Memory cell and method of forming a magnetic tunnel junction (MTJ) of a memory cell |
| US7579197B1 (en) * | 2008-03-04 | 2009-08-25 | Qualcomm Incorporated | Method of forming a magnetic tunnel junction structure |
| US8634231B2 (en) * | 2009-08-24 | 2014-01-21 | Qualcomm Incorporated | Magnetic tunnel junction structure |
| US7781231B2 (en) * | 2008-03-07 | 2010-08-24 | Qualcomm Incorporated | Method of forming a magnetic tunnel junction device |
| US7885105B2 (en) * | 2008-03-25 | 2011-02-08 | Qualcomm Incorporated | Magnetic tunnel junction cell including multiple vertical magnetic domains |
| US9614003B1 (en) * | 2015-10-21 | 2017-04-04 | Globalfoundries Inc. | Method of forming a memory device structure and memory device structure |
| US20190140167A1 (en) * | 2017-11-07 | 2019-05-09 | Everspin Technologies, Inc. | Angled surface removal process and structure relating thereto |
| WO2023026481A1 (ja) * | 2021-08-27 | 2023-03-02 | Tdk株式会社 | 磁気抵抗効果素子及び磁気メモリ |
| TWI809966B (zh) * | 2022-05-17 | 2023-07-21 | 南亞科技股份有限公司 | 具有氟捕捉層的半導體元件結構 |
| US12308319B2 (en) | 2022-05-17 | 2025-05-20 | Nanya Technology Corporation | Semiconductor device structure with fluorine-catching layer |
| US12308290B2 (en) | 2022-05-17 | 2025-05-20 | Nanya Technology Corporation | Method for preparing semiconductor device structure with fluorine-catching layer |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5640343A (en) * | 1996-03-18 | 1997-06-17 | International Business Machines Corporation | Magnetic memory array using magnetic tunnel junction devices in the memory cells |
| US5835314A (en) | 1996-04-17 | 1998-11-10 | Massachusetts Institute Of Technology | Tunnel junction device for storage and switching of signals |
| US5920500A (en) * | 1996-08-23 | 1999-07-06 | Motorola, Inc. | Magnetic random access memory having stacked memory cells and fabrication method therefor |
| JP3593652B2 (ja) * | 2000-03-03 | 2004-11-24 | 富士通株式会社 | 磁気ランダムアクセスメモリ装置 |
| US6515341B2 (en) * | 2001-02-26 | 2003-02-04 | Motorola, Inc. | Magnetoelectronics element having a stressed over-layer configured for alteration of the switching energy barrier |
-
2001
- 2001-04-20 JP JP2001122882A patent/JP4488645B2/ja not_active Expired - Fee Related
-
2002
- 2002-04-15 TW TW091107611A patent/TW543086B/zh not_active IP Right Cessation
- 2002-04-18 KR KR10-2002-0021257A patent/KR100470848B1/ko not_active Expired - Fee Related
- 2002-04-19 CN CNB021161240A patent/CN1187824C/zh not_active Expired - Fee Related
- 2002-04-19 US US10/125,485 patent/US6617658B2/en not_active Expired - Fee Related
-
2003
- 2003-07-09 US US10/615,188 patent/US6764865B2/en not_active Expired - Fee Related
-
2004
- 2004-06-14 US US10/866,129 patent/US6967864B2/en not_active Expired - Fee Related
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