JP2001525991A - 制御された劈開プロセス - Google Patents

制御された劈開プロセス

Info

Publication number
JP2001525991A
JP2001525991A JP54937198A JP54937198A JP2001525991A JP 2001525991 A JP2001525991 A JP 2001525991A JP 54937198 A JP54937198 A JP 54937198A JP 54937198 A JP54937198 A JP 54937198A JP 2001525991 A JP2001525991 A JP 2001525991A
Authority
JP
Japan
Prior art keywords
substrate
cleavage
energy
processing method
particles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP54937198A
Other languages
English (en)
Japanese (ja)
Inventor
ヘンリー、フランソワ・ジェイ
チュン、ナサン・ダブリュ
Original Assignee
シリコン・ジェネシス・コーポレーション
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/026,027 external-priority patent/US5994207A/en
Application filed by シリコン・ジェネシス・コーポレーション filed Critical シリコン・ジェネシス・コーポレーション
Publication of JP2001525991A publication Critical patent/JP2001525991A/ja
Pending legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B26—HAND CUTTING TOOLS; CUTTING; SEVERING
    • B26D—CUTTING; DETAILS COMMON TO MACHINES FOR PERFORATING, PUNCHING, CUTTING-OUT, STAMPING-OUT OR SEVERING
    • B26D3/00—Cutting work characterised by the nature of the cut made; Apparatus therefor
    • B26D3/28—Splitting layers from work; Mutually separating layers by cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B26—HAND CUTTING TOOLS; CUTTING; SEVERING
    • B26F—PERFORATING; PUNCHING; CUTTING-OUT; STAMPING-OUT; SEVERING BY MEANS OTHER THAN CUTTING
    • B26F3/00—Severing by means other than cutting; Apparatus therefor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B26—HAND CUTTING TOOLS; CUTTING; SEVERING
    • B26F—PERFORATING; PUNCHING; CUTTING-OUT; STAMPING-OUT; SEVERING BY MEANS OTHER THAN CUTTING
    • B26F3/00—Severing by means other than cutting; Apparatus therefor
    • B26F3/002—Precutting and tensioning or breaking
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
JP54937198A 1997-05-12 1998-05-11 制御された劈開プロセス Pending JP2001525991A (ja)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US4627697P 1997-05-12 1997-05-12
US60/046,276 1997-05-12
US09/026,115 1998-02-19
US09/026,027 US5994207A (en) 1997-05-12 1998-02-19 Controlled cleavage process using pressurized fluid
US09/026,115 US6155909A (en) 1997-05-12 1998-02-19 Controlled cleavage system using pressurized fluid
US09/026,027 1998-02-19
PCT/US1998/009567 WO1998052216A1 (fr) 1997-05-12 1998-05-11 Procede de clivage controle

Publications (1)

Publication Number Publication Date
JP2001525991A true JP2001525991A (ja) 2001-12-11

Family

ID=27362676

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54937198A Pending JP2001525991A (ja) 1997-05-12 1998-05-11 制御された劈開プロセス

Country Status (6)

Country Link
EP (1) EP0995227A4 (fr)
JP (1) JP2001525991A (fr)
CN (1) CN1146973C (fr)
AU (1) AU7685198A (fr)
CA (1) CA2290104A1 (fr)
WO (1) WO1998052216A1 (fr)

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000223383A (ja) * 1999-02-02 2000-08-11 Canon Inc 分離装置、分離方法及び半導体基板の製造方法
JP2003535472A (ja) * 2000-05-30 2003-11-25 コミツサリア タ レネルジー アトミーク 脆弱化された基板およびそのような基板の製造方法
JP2004515920A (ja) * 2000-12-08 2004-05-27 コミツサリア タ レネルジー アトミーク 気体種の導入を含む薄膜製造方法
JP2004522296A (ja) * 2000-12-28 2004-07-22 コミツサリア タ レネルジー アトミーク 積層構造を形成するための方法
JP2005039114A (ja) * 2003-07-17 2005-02-10 Disco Abrasive Syst Ltd 半導体ウェーハ移し替え装置
JP2005514240A (ja) * 2002-01-03 2005-05-19 エス．オー．アイ．テック、シリコン、オン、インシュレター、テクノロジーズ 基板の層を切断するための装置及び方法
JP2006508533A (ja) * 2002-11-27 2006-03-09 エス．オー．アイ．テック、シリコン、オン、インシュレター、テクノロジーズ 半導体ウエハのアニール方法及び装置
WO2007091639A1 (fr) * 2006-02-09 2007-08-16 Shin-Etsu Chemical Co., Ltd. Procede de fabrication d'un substrat soi
WO2007094230A1 (fr) * 2006-02-13 2007-08-23 Shin-Etsu Chemical Co., Ltd. Procédé de fabrication d'un substrat soi
JP2008532317A (ja) 2005-02-28 2008-08-14 シリコン・ジェネシス・コーポレーション レイヤ転送プロセス用の基板強化方法および結果のデバイス
JP2008218863A (ja) * 2007-03-07 2008-09-18 Shin Etsu Chem Co Ltd 単結晶シリコン太陽電池の製造方法及び単結晶シリコン太陽電池
WO2009011152A1 (fr) * 2007-07-13 2009-01-22 National University Corporation Tohoku University Substrat de silicium sur isolant et dispositif semi-conducteur utilisant un substrat de silicium sur isolant
JP2010103488A (ja) * 2008-08-28 2010-05-06 Silicon Genesis Corp 制御伝搬を利用する膜のレイヤトランスファ
JP2014138189A (ja) * 2013-01-16 2014-07-28 Silicon Genesis Corp 制御されたプロセス及び結果として生じるデバイス
JP2015041666A (ja) * 2013-08-21 2015-03-02 信越半導体株式会社 貼り合わせウェーハの製造方法
JPWO2013058222A1 (ja) * 2011-10-18 2015-04-02 富士電機株式会社 固相接合ウエハの支持基板の剥離方法および半導体装置の製造方法
JP2015531540A (ja) * 2012-09-07 2015-11-02 ソイテックＳｏｉｔｅｃ 選択された界面に沿って少なくとも２つの基板を分離するための方法
JP2016149538A (ja) * 2015-02-10 2016-08-18 ソイテックＳｏｉｔｅｃ 有用層を移動する方法

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG71182A1 (en) 1997-12-26 2000-03-21 Canon Kk Substrate processing apparatus substrate support apparatus substrate processing method and substrate manufacturing method
SG87916A1 (en) 1997-12-26 2002-04-16 Canon Kk Sample separating apparatus and method, and substrate manufacturing method
US6540861B2 (en) * 1998-04-01 2003-04-01 Canon Kabushiki Kaisha Member separating apparatus and processing apparatus
JP2000349264A (ja) 1998-12-04 2000-12-15 Canon Inc 半導体ウエハの製造方法、使用方法および利用方法
JP2000349266A (ja) 1999-03-26 2000-12-15 Canon Inc 半導体部材の製造方法、半導体基体の利用方法、半導体部材の製造システム、半導体部材の生産管理方法及び堆積膜形成装置の利用方法
FR2795865B1 (fr) * 1999-06-30 2001-08-17 Commissariat Energie Atomique Procede de realisation d'un film mince utilisant une mise sous pression
FR2796491B1 (fr) 1999-07-12 2001-08-31 Commissariat Energie Atomique Procede de decollement de deux elements et dispositif pour sa mise en oeuvre
FR2797347B1 (fr) * 1999-08-04 2001-11-23 Commissariat Energie Atomique Procede de transfert d'une couche mince comportant une etape de surfragililisation
EP1939932A1 (fr) * 1999-08-10 2008-07-02 Silicon Genesis Corporation Substrat avec une couche de séparation contrainte en silicium-germanium
US6653209B1 (en) 1999-09-30 2003-11-25 Canon Kabushiki Kaisha Method of producing silicon thin film, method of constructing SOI substrate and semiconductor device
FR2811807B1 (fr) * 2000-07-12 2003-07-04 Commissariat Energie Atomique Procede de decoupage d'un bloc de materiau et de formation d'un film mince
JP2002075917A (ja) 2000-08-25 2002-03-15 Canon Inc 試料の分離装置及び分離方法
FR2817395B1 (fr) 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede
JP4803884B2 (ja) * 2001-01-31 2011-10-26 キヤノン株式会社 薄膜半導体装置の製造方法
JP2002305293A (ja) 2001-04-06 2002-10-18 Canon Inc 半導体部材の製造方法及び半導体装置の製造方法
US6770966B2 (en) * 2001-07-31 2004-08-03 Intel Corporation Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat
US7351300B2 (en) 2001-08-22 2008-04-01 Semiconductor Energy Laboratory Co., Ltd. Peeling method and method of manufacturing semiconductor device
TWI233154B (en) 2002-12-06 2005-05-21 Soitec Silicon On Insulator Method for recycling a substrate
EP1427002B1 (fr) * 2002-12-06 2017-04-12 Soitec Méthode de recyclage d'un substrat par découpage localisé
JP4151421B2 (ja) * 2003-01-23 2008-09-17 セイコーエプソン株式会社 デバイスの製造方法
JP4526561B2 (ja) * 2004-03-22 2010-08-18 ジングルス・テヒノロギース・アクチェンゲゼルシャフト ディスク型基板を分離するための方法および器具
DE102004041378B4 (de) 2004-08-26 2010-07-08 Siltronic Ag Halbleiterscheibe mit Schichtstruktur mit geringem Warp und Bow sowie Verfahren zu ihrer Herstellung
DE102005000826A1 (de) 2005-01-05 2006-07-20 Siltronic Ag Halbleiterscheibe mit Silicium-Germanium-Schicht und Verfahren zu deren Herstellung
JP2008112847A (ja) 2006-10-30 2008-05-15 Shin Etsu Chem Co Ltd 単結晶シリコン太陽電池の製造方法及び単結晶シリコン太陽電池
JP5284576B2 (ja) * 2006-11-10 2013-09-11 信越化学工業株式会社 半導体基板の製造方法
JP2010021398A (ja) * 2008-07-11 2010-01-28 Disco Abrasive Syst Ltd ウェーハの処理方法
US7994064B2 (en) * 2009-06-15 2011-08-09 Twin Creeks Technologies, Inc. Selective etch for damage at exfoliated surface
CN103077885B (zh) * 2013-01-31 2016-06-01 上海新傲科技股份有限公司 受控减薄方法以及半导体衬底
CN104979262B (zh) * 2015-05-14 2020-09-22 浙江中纳晶微电子科技有限公司 一种晶圆分离的方法
CN106529159A (zh) * 2016-10-28 2017-03-22 山东理工大学 压电控制单原子链纳米弦横向振动固有角频率计算方法

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JPH05211128A (ja) * 1991-09-18 1993-08-20 Commiss Energ Atom 薄い半導体材料フィルムの製造方法
JPH05275664A (ja) * 1991-10-11 1993-10-22 Canon Inc 半導体物品の製造方法
JPH07263291A (ja) * 1994-01-26 1995-10-13 Commiss Energ Atom 薄膜で構成された集積部品のための基板とその製造法
JPH07302889A (ja) * 1994-03-10 1995-11-14 Canon Inc 半導体基板の作製方法
JPH10326759A (ja) * 1997-03-26 1998-12-08 Canon Inc 薄膜の形成方法
JPH1145840A (ja) * 1997-03-27 1999-02-16 Canon Inc 複合部材の分離方法、分離された部材、分離装置、半導体基体の作製方法および半導体基体

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FR2725074B1 (fr) * 1994-09-22 1996-12-20 Commissariat Energie Atomique Procede de fabrication d'une structure comportant une couche mince semi-conductrice sur un substrat
SG65697A1 (en) * 1996-11-15 1999-06-22 Canon Kk Process for producing semiconductor article
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Patent Citations (6)

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Publication number Priority date Publication date Assignee Title
JPH05211128A (ja) * 1991-09-18 1993-08-20 Commiss Energ Atom 薄い半導体材料フィルムの製造方法
JPH05275664A (ja) * 1991-10-11 1993-10-22 Canon Inc 半導体物品の製造方法
JPH07263291A (ja) * 1994-01-26 1995-10-13 Commiss Energ Atom 薄膜で構成された集積部品のための基板とその製造法
JPH07302889A (ja) * 1994-03-10 1995-11-14 Canon Inc 半導体基板の作製方法
JPH10326759A (ja) * 1997-03-26 1998-12-08 Canon Inc 薄膜の形成方法
JPH1145840A (ja) * 1997-03-27 1999-02-16 Canon Inc 複合部材の分離方法、分離された部材、分離装置、半導体基体の作製方法および半導体基体

Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000223383A (ja) * 1999-02-02 2000-08-11 Canon Inc 分離装置、分離方法及び半導体基板の製造方法
JP2003535472A (ja) * 2000-05-30 2003-11-25 コミツサリア タ レネルジー アトミーク 脆弱化された基板およびそのような基板の製造方法
JP2004515920A (ja) * 2000-12-08 2004-05-27 コミツサリア タ レネルジー アトミーク 気体種の導入を含む薄膜製造方法
JP2004522296A (ja) * 2000-12-28 2004-07-22 コミツサリア タ レネルジー アトミーク 積層構造を形成するための方法
US7892946B2 (en) 2002-01-03 2011-02-22 S.O.I.Tec Silicon On Insulator Technologies Device and method for cutting an assembly
JP2005514240A (ja) * 2002-01-03 2005-05-19 エス．オー．アイ．テック、シリコン、オン、インシュレター、テクノロジーズ 基板の層を切断するための装置及び方法
JP4813019B2 (ja) * 2002-01-03 2011-11-09 エス．オー．アイ．テック、シリコン、オン、インシュレター、テクノロジーズ 基板の層を切断するための装置及び方法
JP2006508533A (ja) * 2002-11-27 2006-03-09 エス．オー．アイ．テック、シリコン、オン、インシュレター、テクノロジーズ 半導体ウエハのアニール方法及び装置
JP2005039114A (ja) * 2003-07-17 2005-02-10 Disco Abrasive Syst Ltd 半導体ウェーハ移し替え装置
JP2008532317A (ja) 2005-02-28 2008-08-14 シリコン・ジェネシス・コーポレーション レイヤ転送プロセス用の基板強化方法および結果のデバイス
US7977209B2 (en) 2006-02-09 2011-07-12 Shin-Etsu Chemical Co., Ltd. Method for manufacturing SOI substrate
WO2007091639A1 (fr) * 2006-02-09 2007-08-16 Shin-Etsu Chemical Co., Ltd. Procede de fabrication d'un substrat soi
WO2007094230A1 (fr) * 2006-02-13 2007-08-23 Shin-Etsu Chemical Co., Ltd. Procédé de fabrication d'un substrat soi
JP2008218863A (ja) * 2007-03-07 2008-09-18 Shin Etsu Chem Co Ltd 単結晶シリコン太陽電池の製造方法及び単結晶シリコン太陽電池
WO2009011152A1 (fr) * 2007-07-13 2009-01-22 National University Corporation Tohoku University Substrat de silicium sur isolant et dispositif semi-conducteur utilisant un substrat de silicium sur isolant
JPWO2009011152A1 (ja) * 2007-07-13 2010-09-16 国立大学法人東北大学 Ｓｏｉ基板およびｓｏｉ基板を用いた半導体装置
JP2010103488A (ja) * 2008-08-28 2010-05-06 Silicon Genesis Corp 制御伝搬を利用する膜のレイヤトランスファ
JPWO2013058222A1 (ja) * 2011-10-18 2015-04-02 富士電機株式会社 固相接合ウエハの支持基板の剥離方法および半導体装置の製造方法
JP2015531540A (ja) * 2012-09-07 2015-11-02 ソイテックＳｏｉｔｅｃ 選択された界面に沿って少なくとも２つの基板を分離するための方法
JP2014138189A (ja) * 2013-01-16 2014-07-28 Silicon Genesis Corp 制御されたプロセス及び結果として生じるデバイス
JP2015041666A (ja) * 2013-08-21 2015-03-02 信越半導体株式会社 貼り合わせウェーハの製造方法
JP2016149538A (ja) * 2015-02-10 2016-08-18 ソイテックＳｏｉｔｅｃ 有用層を移動する方法

Also Published As

Publication number Publication date
CA2290104A1 (fr) 1998-11-19
EP0995227A1 (fr) 2000-04-26
WO1998052216A1 (fr) 1998-11-19
CN1146973C (zh) 2004-04-21
CN1255237A (zh) 2000-05-31
EP0995227A4 (fr) 2000-07-05
AU7685198A (en) 1998-12-08

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