JP2001202782A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JP2001202782A
JP2001202782A JP2000013107A JP2000013107A JP2001202782A JP 2001202782 A JP2001202782 A JP 2001202782A JP 2000013107 A JP2000013107 A JP 2000013107A JP 2000013107 A JP2000013107 A JP 2000013107A JP 2001202782 A JP2001202782 A JP 2001202782A
Authority
JP
Japan
Prior art keywords
write
data line
write data
line pair
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000013107A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001202782A5 (enExample
Inventor
Hiroaki Tanizaki
弘晃 谷崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Engineering Co Ltd
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Engineering Co Ltd
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Engineering Co Ltd, Mitsubishi Electric Corp filed Critical Mitsubishi Electric Engineering Co Ltd
Priority to JP2000013107A priority Critical patent/JP2001202782A/ja
Priority to US09/613,503 priority patent/US6310808B1/en
Publication of JP2001202782A publication Critical patent/JP2001202782A/ja
Publication of JP2001202782A5 publication Critical patent/JP2001202782A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1069—I/O lines read out arrangements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1096—Write circuits, e.g. I/O line write drivers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Dram (AREA)
  • Static Random-Access Memory (AREA)
JP2000013107A 2000-01-21 2000-01-21 半導体記憶装置 Pending JP2001202782A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000013107A JP2001202782A (ja) 2000-01-21 2000-01-21 半導体記憶装置
US09/613,503 US6310808B1 (en) 2000-01-21 2000-07-10 Semiconductor memory device having structure for high-speed data processing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000013107A JP2001202782A (ja) 2000-01-21 2000-01-21 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2001202782A true JP2001202782A (ja) 2001-07-27
JP2001202782A5 JP2001202782A5 (enExample) 2006-11-09

Family

ID=18540747

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000013107A Pending JP2001202782A (ja) 2000-01-21 2000-01-21 半導体記憶装置

Country Status (2)

Country Link
US (1) US6310808B1 (enExample)
JP (1) JP2001202782A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003100079A (ja) * 2001-09-21 2003-04-04 Mitsubishi Electric Corp 半導体記憶装置
US7184347B2 (en) 2004-07-30 2007-02-27 Samsung Electronics Co., Ltd. Semiconductor memory devices having separate read and write global data lines
JP2009016004A (ja) * 2007-07-09 2009-01-22 Nec Electronics Corp 半導体装置及び半導体装置の制御方法
WO2011145245A1 (ja) * 2010-05-21 2011-11-24 パナソニック株式会社 半導体記憶装置

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6324110B1 (en) * 1999-03-12 2001-11-27 Monolithic Systems Technology, Inc. High-speed read-write circuitry for semi-conductor memory
DE10258168B4 (de) * 2002-12-12 2005-07-07 Infineon Technologies Ag Integrierter DRAM-Halbleiterspeicher und Verfahren zum Betrieb desselben
US8193606B2 (en) * 2005-02-28 2012-06-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device including a memory element
KR100980057B1 (ko) * 2007-06-29 2010-09-03 주식회사 하이닉스반도체 프리차지 제어 회로
JP5291593B2 (ja) * 2009-10-21 2013-09-18 ラピスセミコンダクタ株式会社 半導体記憶装置
KR20170097996A (ko) * 2016-02-19 2017-08-29 에스케이하이닉스 주식회사 반도체 장치
CN115798544B (zh) * 2023-02-13 2023-04-28 长鑫存储技术有限公司 一种读写电路、读写方法和存储器

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5528551A (en) * 1987-05-21 1996-06-18 Texas Instruments Inc Read/write memory with plural memory cell write capability at a selected row address
US5594704A (en) * 1992-04-27 1997-01-14 Mitsubishi Denki Kabushiki Kaisha Synchronous semiconductor memory device
US5511025A (en) * 1993-10-18 1996-04-23 Texas Instruments Incorporated Write per bit with write mask information carried on the data path past the input data latch
JP3247639B2 (ja) * 1997-08-07 2002-01-21 インターナショナル・ビジネス・マシーンズ・コーポレーション 半導体メモリ、半導体メモリのデータ読み出し方法及び書き込み方法
US6125065A (en) * 1998-09-09 2000-09-26 Fujitsu Limited Semiconductor memory with column gates and method of controlling column gates during a write mask operation

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003100079A (ja) * 2001-09-21 2003-04-04 Mitsubishi Electric Corp 半導体記憶装置
US7184347B2 (en) 2004-07-30 2007-02-27 Samsung Electronics Co., Ltd. Semiconductor memory devices having separate read and write global data lines
JP2009016004A (ja) * 2007-07-09 2009-01-22 Nec Electronics Corp 半導体装置及び半導体装置の制御方法
US7692988B2 (en) 2007-07-09 2010-04-06 Nec Electronics Corporation Semiconductor device and method of controlling the same
WO2011145245A1 (ja) * 2010-05-21 2011-11-24 パナソニック株式会社 半導体記憶装置
US8665637B2 (en) 2010-05-21 2014-03-04 Panasonic Corporation Semiconductor memory

Also Published As

Publication number Publication date
US6310808B1 (en) 2001-10-30

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