JP2001160595A5 - - Google Patents
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- Publication number
- JP2001160595A5 JP2001160595A5 JP1999342358A JP34235899A JP2001160595A5 JP 2001160595 A5 JP2001160595 A5 JP 2001160595A5 JP 1999342358 A JP1999342358 A JP 1999342358A JP 34235899 A JP34235899 A JP 34235899A JP 2001160595 A5 JP2001160595 A5 JP 2001160595A5
- Authority
- JP
- Japan
- Prior art keywords
- element isolation
- charge storage
- storage layer
- memory device
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000002955 isolation Methods 0.000 claims 25
- 239000004065 semiconductor Substances 0.000 claims 24
- 239000000758 substrate Substances 0.000 claims 7
- 239000011810 insulating material Substances 0.000 claims 4
- 230000002093 peripheral effect Effects 0.000 claims 2
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34235899A JP3878374B2 (ja) | 1999-12-01 | 1999-12-01 | 不揮発性半導体記憶装置 |
| US09/725,564 US6462373B2 (en) | 1999-12-01 | 2000-11-30 | Nonvolatile semiconductor memory device having tapered portion on side wall of charge accumulation layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34235899A JP3878374B2 (ja) | 1999-12-01 | 1999-12-01 | 不揮発性半導体記憶装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001160595A JP2001160595A (ja) | 2001-06-12 |
| JP2001160595A5 true JP2001160595A5 (enExample) | 2005-04-28 |
| JP3878374B2 JP3878374B2 (ja) | 2007-02-07 |
Family
ID=18353115
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP34235899A Expired - Fee Related JP3878374B2 (ja) | 1999-12-01 | 1999-12-01 | 不揮発性半導体記憶装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6462373B2 (enExample) |
| JP (1) | JP3878374B2 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002246485A (ja) * | 2001-02-13 | 2002-08-30 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置およびその製造方法 |
| US20020130357A1 (en) * | 2001-03-14 | 2002-09-19 | Hurley Kelly T. | Self-aligned floating gate flash cell system and method |
| JP2003007869A (ja) * | 2001-06-26 | 2003-01-10 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| JP4237561B2 (ja) * | 2003-07-04 | 2009-03-11 | 株式会社東芝 | 半導体記憶装置及びその製造方法 |
| US6825526B1 (en) * | 2004-01-16 | 2004-11-30 | Advanced Micro Devices, Inc. | Structure for increasing drive current in a memory array and related method |
| JP2007005380A (ja) * | 2005-06-21 | 2007-01-11 | Toshiba Corp | 半導体装置 |
| US7842618B2 (en) * | 2005-08-01 | 2010-11-30 | Spansion Llc | System and method for improving mesa width in a semiconductor device |
| JP4906329B2 (ja) * | 2005-12-02 | 2012-03-28 | ラピスセミコンダクタ株式会社 | 不揮発性半導体記憶装置及びその製造方法 |
| JP2008016777A (ja) * | 2006-07-10 | 2008-01-24 | Toshiba Corp | 半導体装置およびその製造方法 |
| JP4557992B2 (ja) * | 2007-02-13 | 2010-10-06 | 株式会社東芝 | 半導体装置 |
| US7652335B2 (en) * | 2007-10-17 | 2010-01-26 | Toshiba America Electronics Components, Inc. | Reversely tapered contact structure compatible with dual stress liner process |
| KR101402890B1 (ko) * | 2007-11-30 | 2014-06-27 | 삼성전자주식회사 | 비휘발성 기억 소자 및 그 형성 방법 |
| WO2011097592A1 (en) | 2010-02-07 | 2011-08-11 | Zeno Semiconductor , Inc. | Semiconductor memory device having electrically floating body transistor, and having both volatile and non-volatile functionality and method |
| US8692353B2 (en) * | 2011-09-02 | 2014-04-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure and method |
| US8877614B2 (en) | 2011-10-13 | 2014-11-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Spacer for semiconductor structure contact |
| US10026750B1 (en) * | 2017-11-08 | 2018-07-17 | Macronix International Co., Ltd. | Memory device and method for operating the same |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0817948A (ja) | 1994-06-30 | 1996-01-19 | Toshiba Corp | 半導体装置及びその製造方法 |
| KR100278647B1 (ko) * | 1996-10-05 | 2001-02-01 | 윤종용 | 불휘발성 메모리소자 및 그 제조방법 |
| US6165845A (en) * | 1999-04-26 | 2000-12-26 | Taiwan Semiconductor Manufacturing Company | Method to fabricate poly tip in split-gate flash |
| US6108242A (en) * | 1999-08-10 | 2000-08-22 | Taiwan Semiconductor Mfg. Co. Ltd. | Flash memory with split gate structure and method of fabricating the same |
-
1999
- 1999-12-01 JP JP34235899A patent/JP3878374B2/ja not_active Expired - Fee Related
-
2000
- 2000-11-30 US US09/725,564 patent/US6462373B2/en not_active Expired - Fee Related
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