JP2001076484A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2001076484A5 JP2001076484A5 JP1999248580A JP24858099A JP2001076484A5 JP 2001076484 A5 JP2001076484 A5 JP 2001076484A5 JP 1999248580 A JP1999248580 A JP 1999248580A JP 24858099 A JP24858099 A JP 24858099A JP 2001076484 A5 JP2001076484 A5 JP 2001076484A5
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- supply node
- voltage supply
- storage device
- same direction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 description 1
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24858099A JP4822572B2 (ja) | 1999-09-02 | 1999-09-02 | 半導体記憶装置 |
| US09/514,364 US6201754B1 (en) | 1999-09-02 | 2000-02-28 | Semiconductor memory device having function of supplying stable power supply voltage |
| TW089115797A TW456106B (en) | 1999-09-02 | 2000-08-05 | Semiconductor memory device |
| KR10-2000-0051515A KR100381492B1 (ko) | 1999-09-02 | 2000-09-01 | 안정된 전원 전압을 공급하는 기능을 구비한 반도체 기억장치 |
| US09/764,134 US6337828B2 (en) | 1999-09-02 | 2001-01-19 | Semiconductor memory device having function of supplying stable power supply voltage |
| US10/036,512 US6606274B2 (en) | 1999-09-02 | 2002-01-07 | Semiconductor memory device having function of supplying stable power supply voltage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24858099A JP4822572B2 (ja) | 1999-09-02 | 1999-09-02 | 半導体記憶装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001076484A JP2001076484A (ja) | 2001-03-23 |
| JP2001076484A5 true JP2001076484A5 (enExample) | 2006-09-21 |
| JP4822572B2 JP4822572B2 (ja) | 2011-11-24 |
Family
ID=17180251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24858099A Expired - Fee Related JP4822572B2 (ja) | 1999-09-02 | 1999-09-02 | 半導体記憶装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (3) | US6201754B1 (enExample) |
| JP (1) | JP4822572B2 (enExample) |
| KR (1) | KR100381492B1 (enExample) |
| TW (1) | TW456106B (enExample) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6487648B1 (en) * | 1999-12-15 | 2002-11-26 | Xilinx, Inc. | SDRAM controller implemented in a PLD |
| US6675330B1 (en) * | 2000-01-07 | 2004-01-06 | National Seminconductor Corporation | Testing the operation of integrated circuits by simulating a switching-mode of their power supply inputs |
| KR100374641B1 (ko) * | 2000-11-24 | 2003-03-04 | 삼성전자주식회사 | 스탠바이 모드에서 지연동기 루프회로의 전력소모를감소시키기 위한 제어회로를 구비하는 반도체 메모리장치및 이의 파우워 다운 제어방법 |
| US20040085845A1 (en) * | 2002-10-31 | 2004-05-06 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and semiconductor memory device provided with internal current setting adjustment circuit |
| US6940777B2 (en) * | 2002-10-31 | 2005-09-06 | Renesas Technology Corp. | Semiconductor device and semiconductor memory device provided with internal current setting adjustment circuit |
| KR100576453B1 (ko) * | 2004-03-06 | 2006-05-08 | 주식회사 하이닉스반도체 | 병렬 테스트 회로를 포함하는 메모리 장치 |
| US7142477B1 (en) * | 2004-06-18 | 2006-11-28 | Cypress Semiconductor Corp. | Memory interface system and method for reducing cycle time of sequential read and write accesses using separate address and data buses |
| US7154794B2 (en) * | 2004-10-08 | 2006-12-26 | Lexmark International, Inc. | Memory regulator system with test mode |
| US7170810B1 (en) * | 2005-06-16 | 2007-01-30 | Altera Corporation | Stable programming circuitry for programmable integrated circuits |
| US7248531B2 (en) * | 2005-08-03 | 2007-07-24 | Mosaid Technologies Incorporated | Voltage down converter for high speed memory |
| US20070171735A1 (en) * | 2006-01-25 | 2007-07-26 | Jong-Hoon Oh | Latency circuit for semiconductor memories |
| KR100855969B1 (ko) * | 2007-01-10 | 2008-09-02 | 삼성전자주식회사 | 반도체 메모리장치의 내부 전원전압 발생기 |
| WO2008153645A2 (en) | 2007-05-29 | 2008-12-18 | Rambus, Inc. | Memory comprising : clock generator, clock circuit, voltage regulator |
| EP2006696A1 (en) * | 2007-06-20 | 2008-12-24 | Nxp B.V. | Testable integrated circuit and test method |
| KR20080113969A (ko) * | 2007-06-26 | 2008-12-31 | 주식회사 하이닉스반도체 | 동시 테스트 모드를 지원하는 테스트 회로 |
| US8014214B2 (en) * | 2007-11-08 | 2011-09-06 | Hynix Semiconductor Inc. | Semiconductor memory device |
| US8149643B2 (en) * | 2008-10-23 | 2012-04-03 | Cypress Semiconductor Corporation | Memory device and method |
| US8188786B2 (en) * | 2009-09-24 | 2012-05-29 | International Business Machines Corporation | Modularized three-dimensional capacitor array |
| US9230690B2 (en) * | 2012-11-07 | 2016-01-05 | Apple Inc. | Register file write ring oscillator |
| KR102032230B1 (ko) * | 2013-08-01 | 2019-10-16 | 에스케이하이닉스 주식회사 | 반도체 장치 |
| KR20240067516A (ko) * | 2022-11-09 | 2024-05-17 | 삼성전자주식회사 | 메모리 장치 및 그의 동작 방법 |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100209449B1 (ko) * | 1990-05-21 | 1999-07-15 | 가나이 쓰토무 | 반도체 집적회로 장치 |
| JP2785548B2 (ja) * | 1991-10-25 | 1998-08-13 | 日本電気株式会社 | 半導体メモリ |
| US5329168A (en) * | 1991-12-27 | 1994-07-12 | Nec Corporation | Semiconductor integrated circuit device equipped with substrate biasing system selectively powered from internal and external power sources |
| US5400343A (en) * | 1992-02-28 | 1995-03-21 | Intel Corporation | Apparatus and method for defective column detection for semiconductor memories |
| JP3166281B2 (ja) * | 1992-04-14 | 2001-05-14 | 株式会社日立製作所 | 半導体集積回路及びその製造方法 |
| FR2690751B1 (fr) * | 1992-04-30 | 1994-06-17 | Sgs Thomson Microelectronics | Procede et circuit de detection de fuites de courant dans une ligne de bit. |
| JP3583482B2 (ja) * | 1994-10-04 | 2004-11-04 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| JPH08153400A (ja) * | 1994-11-29 | 1996-06-11 | Mitsubishi Electric Corp | Dram |
| JP3542649B2 (ja) * | 1994-12-28 | 2004-07-14 | 株式会社ルネサステクノロジ | 半導体記憶装置およびその動作方法 |
| JP3523718B2 (ja) | 1995-02-06 | 2004-04-26 | 株式会社ルネサステクノロジ | 半導体装置 |
| JPH0969300A (ja) * | 1995-06-23 | 1997-03-11 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JP3612634B2 (ja) * | 1996-07-09 | 2005-01-19 | 富士通株式会社 | 高速クロック信号に対応した入力バッファ回路、集積回路装置、半導体記憶装置、及び集積回路システム |
| JPH10171774A (ja) * | 1996-12-13 | 1998-06-26 | Fujitsu Ltd | 半導体集積回路 |
| US6208567B1 (en) * | 1997-01-31 | 2001-03-27 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device capable of cutting off a leakage current in a defective array section |
| JPH10247398A (ja) * | 1997-03-05 | 1998-09-14 | Matsushita Electric Ind Co Ltd | 半導体記憶装置及びその検査方法 |
| JP3967002B2 (ja) * | 1997-09-11 | 2007-08-29 | 株式会社ルネサステクノロジ | 半導体集積回路 |
| JP4074697B2 (ja) * | 1997-11-28 | 2008-04-09 | 株式会社ルネサステクノロジ | 半導体装置 |
| KR100245411B1 (ko) * | 1997-12-20 | 2000-02-15 | 윤종용 | 반도체 장치의 병렬 테스트 회로 |
| US6005812A (en) * | 1998-02-27 | 1999-12-21 | Micron Technology, Inc. | Device and method for supplying current to a semiconductor memory to support a boosted voltage within the memory during testing |
| ITMI981124A1 (it) * | 1998-05-21 | 1999-11-21 | Sgs Thomson Microelectronics | Metodo processo e dispositivo per l'individuazione di difetti puntuali che provocano correnti di leakage in un dispositivo di memoria non |
| JP3587702B2 (ja) * | 1998-10-20 | 2004-11-10 | 富士通株式会社 | Dll回路を内蔵する集積回路装置 |
-
1999
- 1999-09-02 JP JP24858099A patent/JP4822572B2/ja not_active Expired - Fee Related
-
2000
- 2000-02-28 US US09/514,364 patent/US6201754B1/en not_active Expired - Lifetime
- 2000-08-05 TW TW089115797A patent/TW456106B/zh not_active IP Right Cessation
- 2000-09-01 KR KR10-2000-0051515A patent/KR100381492B1/ko not_active Expired - Fee Related
-
2001
- 2001-01-19 US US09/764,134 patent/US6337828B2/en not_active Expired - Lifetime
-
2002
- 2002-01-07 US US10/036,512 patent/US6606274B2/en not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2001076484A5 (enExample) | ||
| JPH11204793A5 (enExample) | ||
| JP2004500321A5 (enExample) | ||
| JP2003133365A5 (enExample) | ||
| DE69526811D1 (de) | Integrierte Halbleiterschaltung mit zwei Versorgungsspannungen | |
| JP2001010627A5 (enExample) | ||
| FI923699A0 (fi) | Anordning som bildar en beroeringsskaerm av kapacitiv typ. | |
| JP2002270790A5 (enExample) | ||
| NL1013625A1 (nl) | Laterale hoogspanning halfgeleiderinrichting. | |
| JP2000030463A5 (enExample) | ||
| DE60141670D1 (de) | Halbleiterspeicherbauelement, dessen Herstellungsverfahren und dessen Betriebsweise | |
| JPH10163429A5 (enExample) | ||
| DE69833720D1 (de) | Integrierte Halbleiterschaltung mit On-Chip Kondensatoren | |
| DE60140166D1 (de) | Halbleiterspeicheranordnung mit SRAM Schnittstellevorrichtung | |
| DE60106256D1 (de) | Dynamische halbleiterspeicheranordnung mit wahlfreiem zugriff | |
| JP2000278098A5 (enExample) | ||
| DE60012747D1 (de) | Ladungserzeugende schichten enthaltend polymorphes titanylphthalocyanin vom typ i | |
| DE50015110D1 (de) | Halbleiterspeicherbauelement mit speicherzellen, logikbereichen und füllstrukturen | |
| JP2001316679A5 (enExample) | ||
| JPH10237800A5 (enExample) | ||
| JP2000249895A5 (enExample) | ||
| JPH11103251A5 (enExample) | ||
| JP2001111915A5 (enExample) | ||
| DE59811689D1 (de) | Integrierte Halbleiterschaltung mit wenigstens zwei Versorgungsnetzen | |
| JPH11341982A5 (enExample) |