JP2000299337A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法

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Publication number
JP2000299337A
JP2000299337A JP11105586A JP10558699A JP2000299337A JP 2000299337 A JP2000299337 A JP 2000299337A JP 11105586 A JP11105586 A JP 11105586A JP 10558699 A JP10558699 A JP 10558699A JP 2000299337 A JP2000299337 A JP 2000299337A
Authority
JP
Japan
Prior art keywords
conductive metal
metal layer
electrode
semiconductor device
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11105586A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000299337A5 (enExample
Inventor
Eiji Watanabe
英二 渡辺
Koichi Murata
浩一 村田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11105586A priority Critical patent/JP2000299337A/ja
Priority to US09/515,515 priority patent/US6614113B2/en
Priority to TW089103776A priority patent/TW533519B/zh
Priority to KR10-2000-0011551A priority patent/KR100536036B1/ko
Publication of JP2000299337A publication Critical patent/JP2000299337A/ja
Publication of JP2000299337A5 publication Critical patent/JP2000299337A5/ja
Pending legal-status Critical Current

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    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13116—Lead [Pb] as principal constituent
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
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    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
JP11105586A 1999-04-13 1999-04-13 半導体装置及びその製造方法 Pending JP2000299337A (ja)

Priority Applications (4)

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JP11105586A JP2000299337A (ja) 1999-04-13 1999-04-13 半導体装置及びその製造方法
US09/515,515 US6614113B2 (en) 1999-04-13 2000-02-29 Semiconductor device and method for producing the same
TW089103776A TW533519B (en) 1999-04-13 2000-03-03 Semiconductor device and method for producing the same
KR10-2000-0011551A KR100536036B1 (ko) 1999-04-13 2000-03-08 반도체 장치

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JP2003045875A (ja) * 2001-07-30 2003-02-14 Nec Kagobutsu Device Kk 半導体装置およびその製造方法
US6528881B1 (en) 1999-08-27 2003-03-04 Nec Corporation Semiconductor device utilizing a side wall to prevent deterioration between electrode pad and barrier layer
KR100519893B1 (ko) * 2001-11-15 2005-10-13 인피니온 테크놀로지스 아게 기판상의 상호접속부 제조 방법

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JP2003140347A (ja) * 2001-11-02 2003-05-14 Tokyo Ohka Kogyo Co Ltd 厚膜ホトレジスト層積層体、厚膜レジストパターンの製造方法、および接続端子の製造方法
JP2003188313A (ja) * 2001-12-20 2003-07-04 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
US6762503B2 (en) * 2002-08-29 2004-07-13 Micron Technology, Inc. Innovative solder ball pad structure to ease design rule, methods of fabricating same and substrates, electronic device assemblies and systems employing same
US6995475B2 (en) * 2003-09-18 2006-02-07 International Business Machines Corporation I/C chip suitable for wire bonding
US20050167837A1 (en) * 2004-01-21 2005-08-04 International Business Machines Corporation Device with area array pads for test probing
US7910471B2 (en) * 2004-02-02 2011-03-22 Texas Instruments Incorporated Bumpless wafer scale device and board assembly
JP3981089B2 (ja) * 2004-02-18 2007-09-26 株式会社東芝 半導体装置とその製造方法
TWI278946B (en) * 2004-07-23 2007-04-11 Advanced Semiconductor Eng Structure and formation method for conductive bump
US20060087039A1 (en) * 2004-10-22 2006-04-27 Taiwan Semiconductor Manufacturing Company, Ltd. Ubm structure for improving reliability and performance
US7416980B2 (en) * 2005-03-11 2008-08-26 Intel Corporation Forming a barrier layer in interconnect joints and structures formed thereby
KR100762354B1 (ko) * 2006-09-11 2007-10-12 주식회사 네패스 플립칩 반도체 패키지 및 그 제조방법
JP5101169B2 (ja) 2007-05-30 2012-12-19 新光電気工業株式会社 配線基板とその製造方法
KR101120285B1 (ko) * 2007-07-30 2012-03-07 엔엑스피 비 브이 스트레스 완충 반도체 부품 및 그의 제조 방법
US8349721B2 (en) * 2008-03-19 2013-01-08 Stats Chippac, Ltd. Semiconductor device and method of forming insulating layer on conductive traces for electrical isolation in fine pitch bonding
JP5350022B2 (ja) * 2009-03-04 2013-11-27 パナソニック株式会社 半導体装置、及び該半導体装置を備えた実装体
US8847387B2 (en) * 2009-10-29 2014-09-30 Taiwan Semiconductor Manufacturing Company, Ltd. Robust joint structure for flip-chip bonding
US9607936B2 (en) * 2009-10-29 2017-03-28 Taiwan Semiconductor Manufacturing Company, Ltd. Copper bump joint structures with improved crack resistance
KR101187977B1 (ko) * 2009-12-08 2012-10-05 삼성전기주식회사 패키지 기판 및 그의 제조방법
US9159652B2 (en) * 2013-02-25 2015-10-13 Stmicroelectronics S.R.L. Electronic device comprising at least a chip enclosed in a package and a corresponding assembly process
US9666550B2 (en) * 2014-12-16 2017-05-30 Tongfu Microelectronics Co., Ltd. Method and structure for wafer-level packaging

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JP3361881B2 (ja) 1994-04-28 2003-01-07 株式会社東芝 半導体装置とその製造方法
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US6528881B1 (en) 1999-08-27 2003-03-04 Nec Corporation Semiconductor device utilizing a side wall to prevent deterioration between electrode pad and barrier layer
JP3387083B2 (ja) 1999-08-27 2003-03-17 日本電気株式会社 半導体装置及びその製造方法
JP2003045875A (ja) * 2001-07-30 2003-02-14 Nec Kagobutsu Device Kk 半導体装置およびその製造方法
KR100519893B1 (ko) * 2001-11-15 2005-10-13 인피니온 테크놀로지스 아게 기판상의 상호접속부 제조 방법

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US6614113B2 (en) 2003-09-02

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