JP2000252393A - チップ型電子部品 - Google Patents

チップ型電子部品

Info

Publication number
JP2000252393A
JP2000252393A JP5486999A JP5486999A JP2000252393A JP 2000252393 A JP2000252393 A JP 2000252393A JP 5486999 A JP5486999 A JP 5486999A JP 5486999 A JP5486999 A JP 5486999A JP 2000252393 A JP2000252393 A JP 2000252393A
Authority
JP
Japan
Prior art keywords
resin mold
substrate
chip
electrode
light emitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5486999A
Other languages
English (en)
Other versions
JP3553405B2 (ja
Inventor
Mamoru Maekawa
守 前川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP05486999A priority Critical patent/JP3553405B2/ja
Priority to KR1020000006351A priority patent/KR100595098B1/ko
Priority to TW89102390A priority patent/TW477077B/zh
Priority to US09/515,144 priority patent/US6281435B1/en
Publication of JP2000252393A publication Critical patent/JP2000252393A/ja
Priority to US09/860,697 priority patent/US6601295B2/en
Application granted granted Critical
Publication of JP3553405B2 publication Critical patent/JP3553405B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09145Edge details
    • H05K2201/09181Notches in edge pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10984Component carrying a connection agent, e.g. solder, adhesive
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/045Solder-filled plated through-hole [PTH] during processing wherein the solder is removed from the PTH after processing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126Assembling bases
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128Assembling formed circuit to base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
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    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base

Abstract

(57)【要約】 【課題】 実装の操作性を向上させると共に、切り欠き
に形成されている側面電極に半田が接着しやすくなるよ
うに、かつ、樹脂モールドの移動を防止する構成とした
チップ型発光装置を提供すること。 【解決手段】 基板2に一対の電極パターン3、4を形
成し、電極パターン3のパッド部に発光ダイオ−ド(L
ED)チップ1をダイボンデングにて搭載し、LEDチ
ップ1の電極1aと第2の電極パターン4の表面側電極
4aを金属線5でワイヤボンデングで接続する。LED
チップ1および金属線5は透光性樹脂モールド6で封止
する。基板2の両端には切り欠き7、8を形成し、切り
欠き7、8内の所定の高さまで半田9a、9bが充填さ
れており、透光性樹脂モールド6は一部を切り欠き7、
8内に突出させている。

Description

【発明の詳細な説明】
【0001】
【発明の属する技術分野】本発明は、基板に発光ダイオ
−ド、ダイオ−ド、トランジスタ等の半導体素子を搭載
したチップ型電子部品に関する。
【0002】
【従来の技術】従来、発光源として発光ダイオ−ド(L
ED)チップを用いた小型のチップ型発光装置が知られ
ている。図5はこのようなチップ型発光装置の一例を一
部透視して示す斜視図である。図5において、基板2に
導電材料よりなる一対の電極パターン3、4が形成され
る。一方の電極パターン3は、表面側電極3a、側面電
極3b、裏面側電極3cで構成される。
【0003】他方の電極パターン4も、表面側電極4
a、側面電極4b、裏面側電極4cで構成されている。
基板2の両端には半円状の切り欠き(スルーホール)
7、8を形成し、一対の電極パターン3、4の側面電極
3b、側面電極4bは半円状の切り欠き7、8の内周面
にメッキ層等の導電膜で形成される。一対の電極パター
ン3、4の裏面側電極3c、4cは、プリント基板の配
線パタ−ンと電気的に接続される。
【0004】一方の電極パターン3の表面側電極3aに
は、パッド部3pを形成し、LEDチップ1をダイボン
デングにより搭載する。また、LEDチップ1の電極1
aに金属線5の一方端子5aをワイヤボンデングにて電
気的に接続する。金属線5の他方端子5bは、他方の電
極パターン4の表面側電極4aにワイヤボンデングにて
電気的に接続する。
【0005】ダイボンデングにより基板2の一方の電極
パターン3の表面側電極3aに搭載されたLEDチップ
1と、LEDチップ1の電極1aおよび他方の電極パタ
ーン4の表面側電極4aにワイヤボンデングにて電気的
に接続された金属線5は、透光性樹脂モールド6により
封止される。透光性樹脂モールド6は、切り欠き7、8
内を通過して裏面側に流出しないように、基板2の両側
の端面の位置よりも内側にその端面の位置が配置され
る。このようにして、チップ型発光装置20が形成され
ている。
【0006】
【発明が解決しようとする課題】チップ型発光装置20
は、プリント基板に実装される際に、チャックにより透
光性樹脂モールド6の部分が吸着されて移送される。し
かしながら、図5の構成では、前記のように一対の電極
パターン3、4の表面側電極3a、4aの内側に透光性
樹脂モールド6の両端部が位置している。このため、チ
ップ型発光装置20の基板2の長さよりも透光性樹脂モ
ールド6の長さが短いので吸着面積が少なくなり、長さ
×幅の寸法が1.6×0.8mm以下の超小型のチップ
型発光装置においては、プリント基板への実装処理が円
滑に行えないという問題があった。
【0007】また、透光性樹脂モールド6の底面は、基
板2の表面および一対の電極パターン3、4の表面側電
極3a、4aと平面状に接触している。このため、振動
や衝撃等の外力が作用すると、透光性樹脂モールド6の
底面が基板2の表面および一対の電極パターン3、4の
表面側電極3a、4aの接触面から離脱して、LEDチ
ップ1と金属線5の封止が劣化するという問題があっ
た。
【0008】本発明はこのような問題に鑑みてなされた
ものであり、実装の操作性を向上させると共に、外力が
印加されたときに樹脂モールドの移動を防止する構成と
したチップ型電子部品の提供を目的とする。
【0009】
【課題を解決するための手段】本発明の上記目的は、チ
ップ型電子部品を、両端に切り欠きを形成した基板と、
基板の両端部に対向するように形成される電極パターン
と、基板の表面側に搭載される半導体素子と、前記半導
体素子を封止する樹脂モールドとを備えるチップ型電子
部品において、前記切り欠き内に、基板表面よりも下部
に半田を充填し、樹脂モールドの端面を基板の両端の位
置に延在させてその一部を切り欠き内に突出させた構成
とすることにより達成できる。
【0010】本発明の上記特徴によれば、切り欠き内に
は半田が充填されているので、樹脂モールドの端面の位
置を基板の両端の位置に延在させても、樹脂モールドは
半田に遮られることになり、切り欠きを通過して裏面側
には流出しない。また、側面電極の全てが樹脂モールド
で覆われることがない。このようにして樹脂モールドの
長さを延長することにより樹脂モールドの面積を増大さ
せており、チップ型電子部品をプリント基板に実装する
際の操作性が向上する。
【0011】また、樹脂モールドは切り欠き内に一部突
出させており、この突出部分が鈎状の抜け止め部材とし
て作用する。このため、樹脂モールドに振動や衝撃等の
外力が作用しても、樹脂モールドは基板の表面から離脱
することがなく、半導体素子に対する封止の劣化を防止
することができる。
【0012】
【発明の実施の形態】以下、本発明の実施の形態につい
て図を参照して説明する。図1は本発明の実施の形態に
係るチップ型発光装置の正面図、図2は図1の右側面
図、図3は図1の裏面図である。図5に示した従来例の
チップ型発光装置と同じ部分または対応する部分につい
ては同一の符号を付しており、詳細な説明は省略する。
【0013】図1において、チップ型発光装置10は、
半田9a、9bを切り欠き7、8内で基板2の表面より
も下部に充填する。また、透光性樹脂モールド6の両側
の端面は、基板2の両端の位置まで延在している。透光
性樹脂モールド6は切り欠き7、8内に部分的に突出し
ているが、切り欠き7、8内に充填された半田9a、9
bに遮られて接触面6a、6bから下部には流出しな
い。したがって、切り欠き7、8の内周面に形成される
側面電極全てが透光性樹脂モールド6で覆われることは
ないので、導電経路は遮断されない。
【0014】このため、透光性樹脂モールド6が切り欠
き7、8を通過して基板2の裏面側に回り込むことを防
止できる。このように、透光性樹脂モールド6の両側の
端面を基板2の両側の端部の位置まで延在させているの
で、図5に示した従来例のチップ型発光装置と比較する
と透光性樹脂モールド6の長さが延長され、その面積が
増大している。透光性樹脂モールド6を図1の構成とす
ることにより、チップ型発光装置10をプリント基板に
実装する際の操作性が向上する。
【0015】また、透光性樹脂モールド6は切り欠き
7、8内に一部突出させており、突出部分が鈎状の抜け
止め部材として作用する。このため、透光性樹脂モール
ド6に振動や衝撃等の外力が作用しても、透光性樹脂モ
ールド6は基板2の表面から離脱することがなく、LE
Dチップ1と金属線5の封止の劣化を防止することがで
きる。
【0016】図4は、本発明のチップ型発光装置10を
製造する工程の一例を示す工程図である。次に、この工
程図について説明する。
【0017】(a)の工程では、基材を縦方向および横
方向に所定の大きさに切断してなる基板2に、縦方向お
よび横方向に複数の切り欠き7、8、8a・・・を順次
形成する。次に、各切り欠きの内周面に側面電極が設け
られる一対の電極パタ−ン3、4を基板2に形成する。
続いて、一方の電極パタ−ン3のパッド部にLEDチッ
プ1をダイボンデングにて搭載し、LEDチップ1の電
極と、他方の電極パタ−ン4とをワイヤボンデングにて
電気的に接続する。このようにして、基板2の縦方向お
よび横方向に多数のLEDチップ1を配置する。
【0018】(b)の工程では、各切り欠き7、8、8
a・・・に、半田ボ−ルや半田粉末等の半田の細片9を
基板2の表面の高さまで充填する。次に、各切り欠き
7、8、8a・・・に充填された半田の細片9を、レ−
ザ等により所定の温度で加熱溶融する。
【0019】(c)の工程では、加熱溶融された半田の
細片9を冷却して固化させる。この際に、各切り欠き
7、8、8a・・・内で加熱溶融された半田の細片9は
減容され、半田9a、9b、9c・・・が基板2の表面
の位置よりも下部側で各切り欠き7、8、8a・・・内
に充填される。次に、基板2上を透光性樹脂モールド6
で覆う。
【0020】(d)の工程では、各切り欠き7、8、8
a・・・の中心の位置であるA−A、B−B、C−C、
・・・の線に沿って基板2を切断する。また、所定の幅
で、基板2をA−A、B−B、C−C、・・・の線に直
交する方向で切断する。このようにして、単体のチップ
型発光装置20、・・・が複数製造される。
【0021】上記の例では、基板2に発光ダイオ−ド
(LED)チップ1を搭載し、透光性樹脂モールド6で
封止するチップ型発光装置について説明した。本発明
は、このようなチップ型発光装置に限らず、基板にダイ
オ−ド、トランジスタ等の半導体素子を搭載し、樹脂モ
ールドで封止するチップ型電子部品に一般的に適用する
ことができる。
【0022】前記したような、樹脂モールドの表面面積
が小さいためにプリント基板への実装が円滑に行なえな
いことや、樹脂モールドが基板から剥離することは、長
さ×幅の寸法が、1.6×0.8mm以下、特に1.0
×0.5mmのチップ型電子部品において問題が生じ
る。本発明は、このような超小型のチップ型電子部品に
有効に適用される。
【0023】
【発明の効果】本発明の上記特徴によれば、切り欠き内
には半田が充填されているので、樹脂モールドの端面の
位置を基板の両端の位置に延在させても、樹脂モールド
は半田に遮られることになり、切り欠きを通過して裏面
側には流出しない。また、側面電極の全てが樹脂モール
ドで覆われることがない。このようにして樹脂モールド
の長さを延長することにより樹脂モールドの面積を増大
させており、チップ型電子部品をプリント基板に実装す
る際の操作性が向上する。
【0024】また、樹脂モールドは切り欠き内に一部突
出させており、この突出部分が鈎状の抜け止め部材とし
て作用する。このため、樹脂モールドに振動や衝撃等の
外力が作用しても、樹脂モールドは基板の表面から離脱
することがなく、半導体素子に対する封止の劣化を防止
することができる。
【図面の簡単な説明】
【図1】本発明の実施の形態に係るチップ型発光装置を
示す正面図である。
【図2】図1の右側面図である。
【図3】図1の裏面図である。
【図4】図1のチップ型発光装置の製造工程示す工程図
である。
【図5】従来例のチップ型発光装置の概略の斜視図であ
る。
【符号の説明】 1 LEDチップ 2 基板 3、4 一対の電極パターン 5 金属線 6 透光性樹脂モールド 7、8 切り欠き(スルーホール) 9a、9b 半田 10 チップ型発光装置

Claims (1)

    【特許請求の範囲】
  1. 【請求項1】 両端に切り欠きを形成した基板と、基板
    の両端部に対向するように形成される電極パターンと、
    基板の表面側に搭載される半導体素子と、前記半導体素
    子を封止する樹脂モールドとを備えるチップ型電子部品
    において、前記切り欠き内に、基板表面よりも下部に半
    田を充填し、樹脂モールドの端面を基板の両端の位置に
    延在させてその一部を切り欠き内に突出させたことを特
    徴とするチップ型電子部品。
JP05486999A 1999-03-03 1999-03-03 チップ型電子部品 Expired - Fee Related JP3553405B2 (ja)

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TW89102390A TW477077B (en) 1999-03-03 2000-02-14 Chip type electronic part
US09/515,144 US6281435B1 (en) 1999-03-03 2000-02-29 Chip-type electronic devices
US09/860,697 US6601295B2 (en) 1999-03-03 2001-05-16 Method of producing chip-type electronic devices

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KR100595098B1 (ko) 2006-07-03
US6601295B2 (en) 2003-08-05
KR20000071343A (ko) 2000-11-25

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