ITMI922615A1 - Dispositivo di memoria a semiconduttore per memorizzare dati e bit di parita' - Google Patents

Dispositivo di memoria a semiconduttore per memorizzare dati e bit di parita'

Info

Publication number
ITMI922615A1
ITMI922615A1 IT002615A ITMI922615A ITMI922615A1 IT MI922615 A1 ITMI922615 A1 IT MI922615A1 IT 002615 A IT002615 A IT 002615A IT MI922615 A ITMI922615 A IT MI922615A IT MI922615 A1 ITMI922615 A1 IT MI922615A1
Authority
IT
Italy
Prior art keywords
memory device
semiconductor memory
store data
parity bits
parity
Prior art date
Application number
IT002615A
Other languages
English (en)
Inventor
Tetsushi Tanizaki
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of ITMI922615A0 publication Critical patent/ITMI922615A0/it
Publication of ITMI922615A1 publication Critical patent/ITMI922615A1/it
Application granted granted Critical
Publication of IT1258255B publication Critical patent/IT1258255B/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4096Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Databases & Information Systems (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
ITMI922615A 1991-11-27 1992-11-16 Dispositivo di memoria a semiconduttore per memorizzare dati e bit di parita' IT1258255B (it)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP31263191 1991-11-27
JP4248151A JP2968134B2 (ja) 1991-11-27 1992-09-17 半導体記憶装置

Publications (3)

Publication Number Publication Date
ITMI922615A0 ITMI922615A0 (it) 1992-11-16
ITMI922615A1 true ITMI922615A1 (it) 1994-05-16
IT1258255B IT1258255B (it) 1996-02-22

Family

ID=26538628

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI922615A IT1258255B (it) 1991-11-27 1992-11-16 Dispositivo di memoria a semiconduttore per memorizzare dati e bit di parita'

Country Status (5)

Country Link
US (1) US5297102A (it)
JP (1) JP2968134B2 (it)
KR (1) KR960004736B1 (it)
DE (1) DE4236452C2 (it)
IT (1) IT1258255B (it)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960012790B1 (ko) * 1993-12-29 1996-09-24 현대전자산업 주식회사 옵션 처리를 이용한 리페어 효율 증가 회로
JP3666671B2 (ja) 1994-12-20 2005-06-29 株式会社日立製作所 半導体装置
KR100211760B1 (ko) * 1995-12-28 1999-08-02 윤종용 멀티뱅크 구조를 갖는 반도체 메모리 장치의 데이타 입출력 경로 제어회로
KR100203145B1 (ko) * 1996-06-29 1999-06-15 김영환 반도체 메모리 소자의 뱅크 분산 방법
JP3964491B2 (ja) * 1997-03-25 2007-08-22 株式会社ルネサステクノロジ 半導体記憶装置及び半導体記憶装置の欠陥救済方法
US5973986A (en) * 1998-02-05 1999-10-26 Lsi Logic Corporation Memory device including a column decoder for decoding five columns
KR100326944B1 (ko) * 2000-01-10 2002-03-13 윤종용 향상된 입/출력 라인 구조를 갖는 반도체 메모리 장치
JP4782302B2 (ja) * 2001-04-18 2011-09-28 富士通セミコンダクター株式会社 半導体記憶装置
JP4757607B2 (ja) * 2005-11-08 2011-08-24 富士通セミコンダクター株式会社 半導体メモリ
JP2010257552A (ja) * 2009-04-28 2010-11-11 Elpida Memory Inc 半導体記憶装置
US20110091702A1 (en) * 2009-10-21 2011-04-21 Andrew Peter Pohl Composite Products and Methods for Manufacturing

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960001106B1 (ko) * 1986-12-17 1996-01-18 가부시기가이샤 히다찌세이사꾸쇼 반도체 메모리
JPS63225991A (ja) * 1987-03-16 1988-09-20 Hitachi Ltd 半導体記憶装置
JP2567855B2 (ja) * 1987-03-30 1996-12-25 株式会社東芝 半導体記憶装置
EP0317666B1 (en) * 1987-11-23 1992-02-19 Koninklijke Philips Electronics N.V. Fast operating static ram memory with high storage capacity

Also Published As

Publication number Publication date
US5297102A (en) 1994-03-22
JPH05205463A (ja) 1993-08-13
IT1258255B (it) 1996-02-22
DE4236452C2 (de) 1995-05-24
KR930010980A (ko) 1993-06-23
KR960004736B1 (ko) 1996-04-12
JP2968134B2 (ja) 1999-10-25
ITMI922615A0 (it) 1992-11-16
DE4236452A1 (it) 1993-06-03

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19971129