ITMI920155A0 - Apparecchiatura per provare automaticamente un modo di sollecitazione di un dispositivo di memoria e semiconduttore - Google Patents

Apparecchiatura per provare automaticamente un modo di sollecitazione di un dispositivo di memoria e semiconduttore

Info

Publication number
ITMI920155A0
ITMI920155A0 IT92MI155A ITMI920155A ITMI920155A0 IT MI920155 A0 ITMI920155 A0 IT MI920155A0 IT 92MI155 A IT92MI155 A IT 92MI155A IT MI920155 A ITMI920155 A IT MI920155A IT MI920155 A0 ITMI920155 A0 IT MI920155A0
Authority
IT
Italy
Prior art keywords
stress
semiconductor
mode
memory device
automatically testing
Prior art date
Application number
IT92MI155A
Other languages
English (en)
Inventor
Njin-M Han
Jong-Hoon Lee
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI920155A0 publication Critical patent/ITMI920155A0/it
Publication of ITMI920155A1 publication Critical patent/ITMI920155A1/it
Application granted granted Critical
Publication of IT1260463B publication Critical patent/IT1260463B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/46—Test trigger logic
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81—Threshold

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
  • Credit Cards Or The Like (AREA)
ITMI920155A 1991-08-23 1992-01-28 Apparecchiatura per provare automaticamente un modo di sollecitazione di un dispositivo di memoria a semiconduttore IT1260463B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910014663A KR940004408B1 (ko) 1991-08-23 1991-08-23 반도체 메모리 장치의 자동 스트레스 모드 테스트장치

Publications (3)

Publication Number Publication Date
ITMI920155A0 true ITMI920155A0 (it) 1992-01-28
ITMI920155A1 ITMI920155A1 (it) 1993-02-24
IT1260463B IT1260463B (it) 1996-04-09

Family

ID=19319041

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI920155A IT1260463B (it) 1991-08-23 1992-01-28 Apparecchiatura per provare automaticamente un modo di sollecitazione di un dispositivo di memoria a semiconduttore

Country Status (10)

Country Link
US (1) US5367491A (it)
JP (1) JPH0581900A (it)
KR (1) KR940004408B1 (it)
CN (1) CN1069821A (it)
DE (1) DE4201516C2 (it)
FR (1) FR2680596B1 (it)
GB (1) GB2258924A (it)
IT (1) IT1260463B (it)
NL (1) NL9200168A (it)
TW (1) TW218050B (it)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5532618A (en) * 1992-11-30 1996-07-02 United Memories, Inc. Stress mode circuit for an integrated circuit with on-chip voltage down converter
US5497348A (en) * 1994-05-31 1996-03-05 Texas Instruments Incorporated Burn-in detection circuit
US5610363A (en) * 1995-02-15 1997-03-11 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Enhanced whipple shield
KR0179820B1 (ko) * 1996-02-01 1999-04-15 문정환 반도체 메모리의 번인 감지 회로
US5974577A (en) * 1996-04-24 1999-10-26 Micron Technology, Inc. Integrated circuit with voltage over-stress indicating circuit
US5841714A (en) * 1996-10-21 1998-11-24 Micron Technology, Inc. Supervoltage circuit
TW527491B (en) * 1999-02-02 2003-04-11 Fujitsu Ltd Test method and test circuit for electronic device
US6392472B1 (en) * 1999-06-18 2002-05-21 Mitsubishi Denki Kabushiki Kaisha Constant internal voltage generation circuit
DE10058779A1 (de) * 2000-11-27 2002-06-13 Infineon Technologies Ag Vorrichtung zum Stressen einer integrierten ferroelektrischen Halbleiterspeicherschaltung
KR100385959B1 (ko) * 2001-05-31 2003-06-02 삼성전자주식회사 반도체 메모리장치의 내부전압 발생회로 및 내부전압발생방법
KR100452334B1 (ko) * 2002-10-30 2004-10-12 삼성전자주식회사 반도체 메모리 장치의 모드진입 제어회로 및 모드진입 방법
US7619459B2 (en) * 2006-03-17 2009-11-17 Aeroflex Colorado Springs Inc. High speed voltage translator circuit
US7583108B2 (en) 2006-03-17 2009-09-01 Aeroflex Colorado Springs Inc. Current comparator using wide swing current mirrors
KR100904962B1 (ko) * 2007-05-31 2009-06-26 삼성전자주식회사 스트레스 검출 회로, 이를 포함하는 반도체 칩 및 스트레스검출 방법
EP2775371B1 (en) * 2013-03-04 2021-01-27 Dialog Semiconductor GmbH Current control for output device biasing stage
CN104101763B (zh) * 2013-04-03 2017-11-14 中芯国际集成电路制造(上海)有限公司 一种芯片上传感器

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2201535B (en) * 1987-02-25 1990-11-28 Motorola Inc Cmos analog multiplying circuit
JPS6455857A (en) * 1987-08-26 1989-03-02 Nec Corp Semiconductor integrated device
FR2628217B1 (fr) * 1988-03-07 1990-07-27 Sgs Thomson Microelectronics Circuit de mesure d'un courant
JP2854305B2 (ja) * 1988-10-07 1999-02-03 株式会社日立製作所 半導体記憶装置と半導体記憶装置の動作方法
JPH02177194A (ja) * 1988-12-28 1990-07-10 Mitsubishi Electric Corp ダイナミックランダムアクセスメモリ装置
JPH07105160B2 (ja) * 1989-05-20 1995-11-13 東芝マイクロエレクトロニクス株式会社 半導体記憶装置
US5087834A (en) * 1990-03-12 1992-02-11 Texas Instruments Incorporated Buffer circuit including comparison of voltage-shifted references
US5134587A (en) * 1990-08-17 1992-07-28 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with automatic test mode exit on chip enable
US5132560A (en) * 1990-09-28 1992-07-21 Siemens Corporate Research, Inc. Voltage comparator with automatic output-level adjustment

Also Published As

Publication number Publication date
CN1069821A (zh) 1993-03-10
FR2680596B1 (fr) 1993-11-19
IT1260463B (it) 1996-04-09
DE4201516C2 (de) 1994-04-14
TW218050B (it) 1993-12-21
NL9200168A (nl) 1993-03-16
GB2258924A (en) 1993-02-24
US5367491A (en) 1994-11-22
DE4201516A1 (de) 1993-02-25
KR930005037A (ko) 1993-03-23
FR2680596A1 (fr) 1993-02-26
JPH0581900A (ja) 1993-04-02
GB9202099D0 (en) 1992-03-18
ITMI920155A1 (it) 1993-02-24
KR940004408B1 (ko) 1994-05-25

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19960529