IT8622373A0 - Cella di memoria eeprom a singolo livello di polisilicio con zona di ossido di tunnel. - Google Patents

Cella di memoria eeprom a singolo livello di polisilicio con zona di ossido di tunnel.

Info

Publication number
IT8622373A0
IT8622373A0 IT8622373A IT2237386A IT8622373A0 IT 8622373 A0 IT8622373 A0 IT 8622373A0 IT 8622373 A IT8622373 A IT 8622373A IT 2237386 A IT2237386 A IT 2237386A IT 8622373 A0 IT8622373 A0 IT 8622373A0
Authority
IT
Italy
Prior art keywords
polysilic
memory cell
tunnel oxide
eeprom memory
single level
Prior art date
Application number
IT8622373A
Other languages
English (en)
Other versions
IT8622373A1 (it
IT1198109B (it
Inventor
Carlo Riva
Original Assignee
Sgs Microelettronica Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Microelettronica Spa filed Critical Sgs Microelettronica Spa
Priority to IT22373/86A priority Critical patent/IT1198109B/it
Publication of IT8622373A0 publication Critical patent/IT8622373A0/it
Priority to DE8787202039T priority patent/DE3780767T2/de
Priority to EP87202039A priority patent/EP0268315B1/en
Priority to US07/119,498 priority patent/US4823316A/en
Priority to JP62288600A priority patent/JPS63136573A/ja
Publication of IT8622373A1 publication Critical patent/IT8622373A1/it
Application granted granted Critical
Publication of IT1198109B publication Critical patent/IT1198109B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
IT22373/86A 1986-11-18 1986-11-18 Cella di memoria eeprom a singolo livello di polisilicio con zona di ossido di tunnel IT1198109B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT22373/86A IT1198109B (it) 1986-11-18 1986-11-18 Cella di memoria eeprom a singolo livello di polisilicio con zona di ossido di tunnel
DE8787202039T DE3780767T2 (de) 1986-11-18 1987-10-23 Eeprom-speicherzelle mit einer polysiliziumschicht und einer tunneloxidzone.
EP87202039A EP0268315B1 (en) 1986-11-18 1987-10-23 Eeprom memory cell with a single polysilicon level and a tunnel oxide zone
US07/119,498 US4823316A (en) 1986-11-18 1987-11-12 Eeprom memory cell with a single polysilicon level and a tunnel oxide zone
JP62288600A JPS63136573A (ja) 1986-11-18 1987-11-17 単層ポリシリコン層のトンネル酸化区域を有するｅｅｐｒｏｍメモリセル

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT22373/86A IT1198109B (it) 1986-11-18 1986-11-18 Cella di memoria eeprom a singolo livello di polisilicio con zona di ossido di tunnel

Publications (3)

Publication Number Publication Date
IT8622373A0 true IT8622373A0 (it) 1986-11-18
IT8622373A1 IT8622373A1 (it) 1988-05-18
IT1198109B IT1198109B (it) 1988-12-21

Family

ID=11195385

Family Applications (1)

Application Number Title Priority Date Filing Date
IT22373/86A IT1198109B (it) 1986-11-18 1986-11-18 Cella di memoria eeprom a singolo livello di polisilicio con zona di ossido di tunnel

Country Status (5)

Country Link
US (1) US4823316A (it)
EP (1) EP0268315B1 (it)
JP (1) JPS63136573A (it)
DE (1) DE3780767T2 (it)
IT (1) IT1198109B (it)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5324677A (en) * 1988-06-15 1994-06-28 Seiko Instruments Inc. Method of making memory cell and a peripheral circuit
JPH02125470A (ja) * 1988-06-15 1990-05-14 Seiko Instr Inc 半導体不揮発性メモリ
KR920001402B1 (ko) * 1988-11-29 1992-02-13 삼성전자 주식회사 불휘발성 반도체 기억소자
IT1228822B (it) * 1989-03-23 1991-07-04 Sgs Thomson Microelectronics Cella di riferimento per la lettura di dispositivi di memoria eeprom.
IT1230363B (it) * 1989-08-01 1991-10-18 Sgs Thomson Microelectronics Cella di memoria eeprom, con protezione migliorata da errori dovuti a rottura della cella.
IT1232354B (it) * 1989-09-04 1992-01-28 Sgs Thomson Microelectronics Procedimento per la realizzazione di celle di memoria eeprom a singolo livello di polisilicio e ossido sottile utilizzando ossidazione differenziale.
US5355007A (en) * 1990-11-23 1994-10-11 Texas Instruments Incorporated Devices for non-volatile memory, systems and methods
DE69018832T2 (de) * 1990-12-31 1995-11-23 Sgs Thomson Microelectronics EEPROM-Zelle mit einschichtigem Metallgate und mit einem Lese-Interface des externen Schaltkreises, welches isoliert ist vom Schreib/Lösch-Interface des Programmierungsschaltkreises.
US5282161A (en) * 1990-12-31 1994-01-25 Sgs-Thomson Microelectronics S.R.L. Eeprom cell having a read interface isolated from the write/erase interface
IT1252025B (it) * 1991-11-29 1995-05-27 Sgs Thomson Microelectronics Procedimento per la realizzazione di celle di memoria a sola lettura programmabili e cancellabili elettricamente a singolo livello di polisilicio
JP3293893B2 (ja) * 1991-12-09 2002-06-17 株式会社東芝 半導体不揮発性記憶装置の製造方法
US5301150A (en) * 1992-06-22 1994-04-05 Intel Corporation Flash erasable single poly EPROM device
US5440159A (en) * 1993-09-20 1995-08-08 Atmel Corporation Single layer polysilicon EEPROM having uniform thickness gate oxide/capacitor dielectric layer
JP2663863B2 (ja) * 1994-04-19 1997-10-15 日本電気株式会社 不揮発性半導体記憶装置
EP0776049B1 (en) * 1995-11-21 2000-08-30 Programmable Microelectronics Corporation PMOS single-poly non-volatile memory structure
FR2764736B1 (fr) * 1997-06-17 2000-08-11 Sgs Thomson Microelectronics Cellule eeprom a un seul niveau de silicium polycristallin et zone tunnel auto-alignee
US5885871A (en) * 1997-07-31 1999-03-23 Stmicrolelectronics, Inc. Method of making EEPROM cell structure
DE102006024121B4 (de) * 2006-05-22 2011-02-24 Telefunken Semiconductors Gmbh & Co. Kg Nichtflüchtige Speicherzelle einer in einem Halbleiterplättchen integrierten Schaltung, Verfahren zu deren Herstellung und Verwendung einer nichtflüchtigen Speicherzelle
DE102006038936A1 (de) 2006-08-18 2008-02-28 Atmel Germany Gmbh Schaltregler, Transceiverschaltung und schlüsselloses Zugangskontrollsystem

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59155968A (ja) * 1983-02-25 1984-09-05 Toshiba Corp 半導体記憶装置
EP0133667A3 (en) * 1983-08-12 1987-08-26 American Microsystems, Incorporated High coupling ratio dense electrically erasable programmable read-only memory
FR2562707A1 (fr) * 1984-04-06 1985-10-11 Efcis Point-memoire electriquement effacable et reprogrammable, comportant une grille flottante au-dessus d'une grille de commande
US4754320A (en) * 1985-02-25 1988-06-28 Kabushiki Kaisha Toshiba EEPROM with sidewall control gate
JPS60258968A (ja) * 1985-05-20 1985-12-20 Agency Of Ind Science & Technol 浮遊ゲート形不揮発性半導体メモリ

Also Published As

Publication number Publication date
US4823316A (en) 1989-04-18
DE3780767D1 (de) 1992-09-03
IT8622373A1 (it) 1988-05-18
EP0268315A2 (en) 1988-05-25
IT1198109B (it) 1988-12-21
EP0268315A3 (en) 1988-12-14
EP0268315B1 (en) 1992-07-29
DE3780767T2 (de) 1993-03-18
JPS63136573A (ja) 1988-06-08

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19971129